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512MILFT PDF预览

512MILFT

更新时间: 2024-02-19 12:37:13
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路光电二极管PC
页数 文件大小 规格书
7页 186K
描述
LOCO™ PLL CLOCK MULTIPLIER

512MILFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.67
Samacsys Description:SOIC 150 MIL其他特性:ALSO OPERATE AT 3.3V AT 160 MHZ
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:1
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V主时钟/晶体标称频率:50 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Clock Generators最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

512MILFT 数据手册

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DATASHEET  
LOCO™ PLL CLOCK MULTIPLIER  
ICS512  
Description  
Features  
The ICS512 is the most cost effective way to generate  
a high-quality, high frequency clock output and a  
reference clock from a lower frequency crystal or clock  
input. The name LOCO stands for Low Cost Oscillator,  
as it is designed to replace crystal oscillators in most  
electronic systems. Using Phase-Locked-Loop (PLL)  
techniques, the device uses a standard fundamental  
mode, inexpensive crystal to produce output clocks up  
to 200 MHz. With a reference output, this chip plus an  
inexpensive crystal can replace two oscillators  
Packaged as 8-pin SOIC or die  
Pb (lead ) free package  
Upgrade of popular ICS502 with:  
— changed multiplier table  
— higher operating frequncies  
Zero ppm multiplication error  
Easy to cascade with other 5xx series  
Input crystal frequency of 5 - 27 MHz  
Input clock frequency of 2 - 50 MHz  
Output clock frequencies up to 200 MHz  
Compatible with all popular CPUs  
Stored in the chip’s ROM is the ability to generate nine  
different multiplication factors, allowing one chip to  
output many common frequencies (see table on page  
2).  
This product is intended for clock generation. It has low  
output jitter (variation in the output period), but input to  
output skew and jitter are not defined or guaranteed.  
For applications which require defined input to output  
skew, use the ICS570B.  
Duty cycle of 45/55 up to 200 MHz  
Mask option for nine selectable frequencies  
Operating voltages of 3.0 to 5.5 V  
Industrial temperature version available  
Advanced, low power CMOS process  
Block Diagram  
VDD  
PLL Clock  
Synthesis  
and Control  
Circuitry  
CLK  
REF  
2
S1, S0  
X1/ICLK  
Crystal or  
Clock input  
Crystal  
Oscillator  
X2  
Optional crystal  
capacitors  
GND  
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER  
1
ICS512  
REV H 051310  

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