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290GI-XXLF PDF预览

290GI-XXLF

更新时间: 2024-02-06 23:14:12
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 102K
描述
Clock Generator, 200MHz, CMOS, PDSO20, 0.173 INCH, ROHS COMPLIANT, TSSOP-20

290GI-XXLF 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.16
Is Samacsys:NJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5 mm
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260主时钟/晶体标称频率:166 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

290GI-XXLF 数据手册

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DATASHEET  
TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER ICS290  
Description  
Features  
The ICS290 field programmable spread spectrum clock  
synthesizer generates up to eight high-quality,  
high-frequency clock outputs including multiple reference  
clocks from a low-frequency crystal input. It is designed to  
replace crystals, crystal oscillators and stand alone spread  
spectrum devices in most electronic systems.  
Packaged as 20-pin TSSOP – Pb-free, RoHS compliant  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Configurable Spread Spectrum Modulation  
Input crystal frequency of 5 to 27 MHz  
Clock input frequency of 3 to 166 MHz  
Up to eight reference outputs  
Up to two sets of four low-skew outputs  
Operating voltages of 3.3 V  
Controllable output drive levels  
TM  
Using IDT’s VersaClock software to configure PLLs and  
outputs, the ICS290 contains a One-Time Programmable  
(OTP) ROM for field programmability. Programming  
features include input/output frequencies, spread spectrum  
amount, eight selectable configuration registers and up to  
two sets of four low-skew outputs.  
Using Phase-Locked Loop (PLL) techniques, the device  
runs from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace multiple crystals and  
oscillators, saving board space and cost.  
Advanced, low-power CMOS process  
The ICS290 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
3
VDD  
PLL1 with  
Spread  
Spectrum  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
CLK7  
CLK8  
3
S2:S0  
OTP  
ROM  
with PLL  
Values  
Divide  
Logic  
and  
Output  
Enable  
Control  
PLL2  
PLL3  
X1/ICLK  
Crystal  
Oscillator  
Crystal or  
Clock Input  
X2  
GND  
3
External capacitors  
are required with a crystal input.  
PDTS  
IDT® TRIPLE PLL FIELD PROG. SPREAD SPECTRUM CLOCK SYNTHESIZER  
1
ICS290  
REV H 030212  

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