IDT23S09T
2.5VZERODELAYCLOCKBUFFER,SPREADSPECTRUMCOMPATIBLE
COMMERCIALTEMPERATURERANGE
IDT23S09T
2.5V ZERO DELAY
CLOCK BUFFER, SPREAD
SPECTRUM COMPATIBLE
FEATURES:
DESCRIPTION:
• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bank of
four outputs
The IDT23S09T is a high-speed phase-lock loop (PLL) clock buffer,
designedtoaddresshigh-speedclockdistributionapplications. Thezero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• No external RC network required
• Operates at 2.5V VDD
TheIDT23S09Tisa16-pinversionoftheIDT23S05T. TheIDT23S09T
acceptsonereferenceinput,anddrivestwobanksoffourlowskewclocks.
All parts have on-chip PLLs which lock to an input clock on the REF pin.
The PLL feedback is on-chip and is obtained from the CLKOUT pad. In
the absence of an input clock, the IDT23S09T enters power down, and
• Spread spectrum compatible
• Available in SOIC package
theoutputsaretri-stated.Inthismode,thedevicewilldrawlessthan12µA.
FUNCTIONALBLOCKDIAGRAM
16
CLKOUT
2
CLKA1
PLL
1
REF
3
CLKA2
14
CLKA3
15
CLKA4
8
S2
Control
Logic
9
S1
6
CLKB1
7
CLKB2
10
CLKB3
11
CLKB4
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
COMMERCIAL TEMPERATURE RANGE
MAY 2010
1
c
2003 Integrated Device Technology, Inc.
DSC 6396/8