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23S08E-1PGG8 PDF预览

23S08E-1PGG8

更新时间: 2024-01-29 21:39:54
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
10页 72K
描述
Clock Driver, PDSO16

23S08E-1PGG8 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:TSSOP, TSSOP16,.25Reach Compliance Code:compliant
风险等级:5.84JESD-30 代码:R-PDSO-G16
JESD-609代码:e3最大I(ol):0.008 A
湿度敏感等级:1端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:3.3 V
认证状态:Not Qualified子类别:Clock Drivers
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

23S08E-1PGG8 数据手册

 浏览型号23S08E-1PGG8的Datasheet PDF文件第2页浏览型号23S08E-1PGG8的Datasheet PDF文件第3页浏览型号23S08E-1PGG8的Datasheet PDF文件第4页浏览型号23S08E-1PGG8的Datasheet PDF文件第5页浏览型号23S08E-1PGG8的Datasheet PDF文件第6页浏览型号23S08E-1PGG8的Datasheet PDF文件第7页 
3.3V ZERO DELAY CLOCK  
MULTIPLIER, SPREAD  
IDT23S08E  
SPECTRUM COMPATIBLE  
FEATURES:  
DESCRIPTION:  
• Phase-Lock Loop Clock Distribution for Applications ranging  
from 10MHz to 200MHz operating frequency  
Distributes one clock input to two banks of four outputs  
• Separate output enable for each output bank  
• External feedback (FBK) pin is used to synchronize the outputs  
to the clock input  
TheIDT23S08Eis ahigh-speedphase-lockloop(PLL)clockmultiplier.It  
isdesignedtoaddresshigh-speedclockdistributionandmultiplicationapplica-  
tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming  
clockandtheoutputclock,operablewithintherangeof10to200MHz.  
TheIDT23S08Ehastwobanksoffouroutputseachthatarecontrolledvia  
twoselectaddresses.Byproperselectionofinputaddresses,bothbankscan  
beputintri-statemode.Intestmode,thePLListurnedoff,andtheinputclock  
directlydrives theoutputs forsystemtestingpurposes.Intheabsenceofan  
inputclock,theIDT23S08Eenterspowerdown.Inthismode,thedevicewill  
• Output Skew <200 ps  
Low jitter <200 ps cycle-to-cycle  
• 1x, 2x, 4x output options (see table):  
IDT23S08E-1 1x  
IDT23S08E-2 1x, 2x  
IDT23S08E-3 2x, 4x  
drawlessthan12µAforCommercialTemperaturerangeandlessthan25µA  
forIndustrialtemperaturerange,andtheoutputsaretri-stated.  
The IDT23S08E is available in six unique configurations for both pre-  
scaling and multiplication of the Input REF Clock. (See available options  
table.)  
ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser  
tocontrolthedelaybetweentheinputclockandtheoutputs.  
The IDT23S08E is characterized for both Industrial and Commercial  
operation.  
IDT23S08E-4 2x  
IDT23S08E-1H, -2H, and -5H for High Drive  
No external RC network required  
• Operates at 3.3V VDD  
• Spread spectrum compatible  
Available in SOIC and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
(-3, -4)  
16  
2
FBK  
REF  
2
CLKA1  
PLL  
1
2
(-5)  
3
CLKA2  
14  
CLKA3  
15  
CLKA4  
8
9
S2  
S1  
Control  
Logic  
2
(-2, -3)  
6
CLKB1  
CLKB2  
CLKB3  
CLKB4  
7
10  
11  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
MARCH 2006  
1
c
2006 Integrated Device Technology, Inc.  
DSC 6499/7  

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