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23S05-1HDCG PDF预览

23S05-1HDCG

更新时间: 2024-01-18 16:36:13
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路光电二极管PC
页数 文件大小 规格书
9页 165K
描述
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE

23S05-1HDCG 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:0.150 INCH, GREEN, MS-012, SOIC-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.63
Samacsys Confidence:3Samacsys Status:Released
2D Presentation:https://componentsearchengine.com/2D/0T/11319421.2.1.pngSchematic Symbol:https://componentsearchengine.com/symbol.php?partID=11319421
PCB Footprint:https://componentsearchengine.com/footprint.php?partID=113194213D View:https://componentsearchengine.com/viewer/3D.php?partID=11319421
Samacsys PartID:11319421Samacsys Image:https://componentsearchengine.com/Images/9/23S05-1HDCGI.jpg
Samacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/2/23S05-1HDCGI.jpgSamacsys Pin Count:8
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:(8-pin SOIC, 150 Mil. Narrow Body)Samacsys Released Date:2020-02-05 10:24:57
Is Samacsys:N系列:23S
输入调节:STANDARDJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER最大I(ol):0.032 A
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:8
实输出次数:4最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.25 ns座面最大高度:1.75 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
最小 fmax:133 MHzBase Number Matches:1

23S05-1HDCG 数据手册

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IDT23S05  
3.3V ZERO DELAY CLOCK  
BUFFER, SPREAD SPECTRUM  
COMPATIBLE  
FEATURES:  
DESCRIPTION:  
• Phase-Lock Loop Clock Distribution  
• 10MHz to 133MHz operating frequency  
• Distributes one clock input to one bank of five outputs  
• Zero Input-Output Delay  
The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer,  
designed to address high-speed clock distribution applications. The zero  
delay is achieved by aligning the phase between the incoming clock and  
the output clock, operable within the range of 10 to 133MHz.  
• Output Skew < 250ps  
The IDT23S05 is an 8-pin version of the IDT23S09. IDT23S05 accepts  
one reference input, and drives out five low skew clocks. The -1H version  
ofthisdeviceoperatesupto133MHzfrequencyandhasahigherdrivethan  
the -1 device. All parts have on-chip PLLs which lock to an input clock on  
theREFpin.ThePLLfeedbackison-chipandisobtainedfromtheCLKOUT  
pad. In the absence of an input clock, the IDT23S05 enters power down.  
• Low jitter <200 ps cycle-to-cycle  
• IDT23S05-1 for Standard Drive  
• IDT23S05-1H for High Drive  
• No external RC network required  
• Operates at 3.3V VDD  
• Power down mode  
• Spread spectrum compatible  
• Available in SOIC package  
Inthismode,thedevicewilldrawlessthan1AforCommercialTempera-  
turerangeandlessthan2AforIndustrialtemperaturerange, theoutputs  
aretri-stated, andthePLLisnotrunning, resultinginasignificantreduction  
of power.  
The IDT23S05 is characterized for both Industrial and Commercial  
operation.  
FUNCTIONALBLOCKDIAGRAM  
8
CLKOUT  
3
CLK1  
PLL  
1
Control  
Logic  
REF  
2
CLK2  
CLK3  
CLK4  
5
7
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
AUGUST 2010  
1
c
2010 Integrated Device Technology, Inc.  
DSC 6381/7  

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