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2059GI-02T PDF预览

2059GI-02T

更新时间: 2024-01-02 14:14:33
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
12页 259K
描述
Video Clock Generator, 27MHz, CMOS, PDSO16, 0.173 INCH, TSSOP-16

2059GI-02T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:0.173 INCH, TSSOP-16
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.88JESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:5 mm
湿度敏感等级:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:27 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3.3 V主时钟/晶体标称频率:27 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Clock Generators最大压摆率:15 mA
最大供电电压:3.45 V最小供电电压:3.15 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, VIDEO
Base Number Matches:1

2059GI-02T 数据手册

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DATASHEET  
CLOCK MULTIPLIER AND JITTER ATTENUATOR  
ICS2059-02  
Description  
Features  
The ICS2059-02 is a VCXO (Voltage Controlled Crystal  
Oscillator) based clock multiplier and jitter attenuator  
designed for system clock distribution applications.  
This monolithic IC, combined with an external  
inexpensive quartz crystal, can be used to replace a  
more costly hybrid VCXO retiming module. A dual input  
mux is also provided.  
Excellent jitter attenuation for telecom and video  
clocks  
2:1 Input MUX for input reference clocks  
No switching glitches on output  
VCXO-based clock generation offers very low jitter  
and phase noise generation  
Output clock is phase and frequency locked to the  
By controlling the VCXO frequency within a  
phase-locked loop (PLL), the output clock is phase and  
frequency locked to the input clock. Through selection  
of external loop filter components, the PLL loop  
bandwidth and damping factor can be tailored to meet  
system clock requirements. A loop bandwidth down to  
the Hz range is possible.  
selected input reference clock  
Fixed input to output phase relationship  
+115 ppm minimum crystal frequency pullability  
range, using recommended crystal  
Industrial temperature range  
Low power CMOS technology  
16-pin TSSOP package  
Single 3.3 V power supply  
Block Diagram  
Pullable Crystal  
VDD  
3
ISET  
X1  
X2  
VDD  
ICLK2  
Input Clock  
Input Clock  
1
0
Selectable  
Divider  
Phase  
Detector  
CLK  
VCXO  
ICLK1  
Charge  
Pump  
ISEL  
2
SEL1:0  
CHGP  
VIN  
GND  
2
IDT™ / ICS™ CLOCK MULTIPLIER AND JITTER ATTENUATOR  
1
ICS2059-02  
REV E 051310  

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