5秒后页面跳转
1526GT PDF预览

1526GT

更新时间: 2024-02-10 04:55:19
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
12页 711K
描述
PLL Based Clock Driver, 1526 Series, 3 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 M PITCH, LEAD FREE, TSSOP-16

1526GT 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
系列:1526输入调节:SCHMITT TRIGGER
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:3最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
传播延迟(tpd):10 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):1 ns座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:4.4 mm
最小 fmax:110 MHzBase Number Matches:1

1526GT 数据手册

 浏览型号1526GT的Datasheet PDF文件第2页浏览型号1526GT的Datasheet PDF文件第3页浏览型号1526GT的Datasheet PDF文件第4页浏览型号1526GT的Datasheet PDF文件第5页浏览型号1526GT的Datasheet PDF文件第6页浏览型号1526GT的Datasheet PDF文件第7页 
DATA SHEET  
ICS1526  
Video Clock Synthesizer  
General Description  
Features  
• Lead-free packaging (Pb-free)  
The ICS1526 is a low-cost, high-performance  
frequency generator. It is suited to general purpose  
phase controlled clock synthesis as well as  
line-locked and genlocked high-resolution video  
applications. Using ICS’s advanced low-voltage  
CMOS mixed-mode technology, the ICS1526 is an  
effective clock synthesizer that supports video  
projectors and displays at resolutions from VGA to  
beyond XGA.  
• Low jitter (typical 27 ps short term jitter)  
• Wide input frequency range  
• 8 kHz to 100 MHz  
• LVCMOS single-ended clock outputs  
• Up to 110 MHz  
• Uses 3.3 V power supply  
• 5 Volt tolerant Inputs (HSYNC, VSYNC)  
The ICS1526 offers single-ended clock outputs to 110  
MHz. The HSYNC_out, and VSYNC_out pins provide  
the regenerated versions of the HSYNC and VSYNC  
inputs synchronous to the CLK output.  
• Coast (ignore HSYNC) capability via VSYNC pin  
2
• Industry standard I C-bus programming interface  
2
• PLL Lock detection via I C or LOCK output pin  
• 16-pin TSSOP package  
The advanced PLL uses its internal programmable  
feedback divider. The device is programmed by a  
standard I2C-bus™ serial interface and is available in  
a TSSOP16 package.  
Applications  
• Frequency synthesis  
• LCD monitors, video projectors and plasma displays  
• Genlocking multiple video subsystems  
ICS1526 Functional Diagram  
Pin Configuration (16-pin TSSOP)  
HSYNC_out  
VSYNC_out  
CLK  
OSC  
HSYNC  
VSYNC  
I2C  
VSSD  
SDA  
VDDD  
VSSQ  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
ICS1526  
SCL  
VSYNC  
VSYNC_out  
VDDQ  
LOCK  
HSYNC  
CLK  
HSYNC_out  
LOCK  
I2CADR  
VDDA  
VSSA  
OSC  
IDT™ / ICS™ Video Clock Synthesizer  
ICS1526  
1

与1526GT相关器件

型号 品牌 描述 获取价格 数据表
1526-M5 ETC STERNKNOPF INNENGEWINDE M5 10ST

获取价格

1526-M6 ETC STERNKNOPF INNENGEWINDE M6 10ST

获取价格

152-7.3728M-12-10R-TR OSCILENT Parallel - Fundamental Quartz Crystal, 7.3728MHz Nom, HC-25US, 2 PIN

获取价格

152-7.3728M-13-10GR-TR OSCILENT Parallel - Fundamental Quartz Crystal, 7.3728MHz Nom, HC-25US, 2 PIN

获取价格

152-7.3728M-13-50NR OSCILENT Parallel - Fundamental Quartz Crystal, 7.3728MHz Nom, HC-25US, 2 PIN

获取价格

152-7.3728M-13-NR OSCILENT Parallel - Fundamental Quartz Crystal, 7.3728MHz Nom, HC-25US, 2 PIN

获取价格