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33931

更新时间: 2022-09-18 16:11:44
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
21页 1200K
描述
5.0 A Throttle Control H-bridge

33931 数据手册

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Document Number: MC33931  
Rev. 2.0, 12/2008  
Freescale Semiconductor  
Advance Information  
5.0 A Throttle Control H-bridge  
33931  
The 33931 is a monolithic H-bridge Power IC in a robust thermally  
enhanced package. It is designed primarily for automotive electronic  
throttle control, but is applicable to any low-voltage DC servo motor  
control application within the current and voltage limits stated in this  
specification.  
THROTTLE CONTROL H-BRIDGE  
The 33931 H-bridge is able to control inductive loads with currents  
up to 5.0 A peak. RMS current capability is subject to the degree of  
heatsinking provided to the device package. Internal peak-current  
limiting (regulation) is activated at load currents above 6.5 A ±1.5 A.  
Output loads can be pulse width modulated (PWM-ed) at frequencies  
up to 11 kHz. A load current feedback feature provides a proportional  
(0.24% of the load current) current output suitable for monitoring by a  
microcontroller’s A/D input. A Status Flag output reports under-voltage,  
over-current, and over-temperature fault conditions.  
VW SUFFIX (PB-FREE)  
98ARH98330A  
44-PIN HSOP  
WITH PROTRUDING HEAT SINK  
Two independent inputs provide polarity control of two half-bridge  
totem-pole outputs. The disable inputs are provided to force the H-  
bridge outputs to tri-state (high-impedance off-state).  
ORDERING INFORMATION  
Temperature  
Features  
Device  
Package  
• 8.0 V to 28 V continuous operation (transient operation from  
5.0 V to 40 V)  
• 235 mΩ maximum RDS(ON) @ Tj=150°C (each H-bridge  
MOSFET)  
Range (T )  
A
MC33931VW/R2  
-40°C to 125°C  
44 HSOP  
• 3.0 V and 5.0 V TTL / CMOS logic compatible inputs  
• Over-current limiting (regulation) via internal constant-off-time PWM  
• Output short-circuit protection (short to VPWR or GND)  
• Temperature-dependant current-limit threshold reduction  
• All inputs have an internal source/sink to define the default (floating input) states  
• Sleep mode with current draw < 50 µA (each half with inputs floating or set to match default logic states)  
V
V
PWR  
DD  
33931  
SF  
FB  
VPWR  
CCP  
OUT1  
IN1  
IN2  
MOTOR  
MCU  
OUT2  
D1  
EN/D2  
PGND  
AGND  
Figure 1. MC33931 Simplified Application Diagram  
* This document contains certain information on a new product.  
Specifications and information herein are subject to change without notice.  
© Freescale Semiconductor, Inc., 2008. All rights reserved.  

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