Document Number: MC33781
Rev. 4.0, 7/2008
Freescale Semiconductor
Advance Information
Quad DSI 2.02 Master with
Differential Drive and
Frequency Spreading
33781
The 33781 is a master device for four differential DSI 2.02 buses.
It contains the logic to interface the buses to a standard serial
peripheral interface (SPI) port and the analog circuitry to drive data
and power over the bus, as well as receive data from the remote slave
devices.
DIFFERENTIAL DSI 2.02 MASTER
The differential mode of the 33781 generates lower
electromagnetic interference (EMI) in situations where data rates and
wiring make this a problem. Frequency spreading further reduces
interference by spreading the energy across many frequencies,
reducing the energy in any single frequency.
EK SUFFIX (PB-FREE)
98ASA10556D
32-PIN SOICW EP
Features
• Four independent differential DSI (DBUS) channels
• Dual SPI interface
ORDERING INFORMATION
Temperature
• Enhanced bus fault performance
• Automatic message cyclical redundancy checking (CRC)
generation and checking for each channel
• Enhanced register set with addressable buffer allows queuing of 4
independent slave commands at one time for each channel
• 8- to 16-Bit messages with 0- to 8-Bit CRC
• Independent frequency spreading for each channel
• Pseudo bus switch feature on channel 0
• Pb-free packaging designated by suffix code EK
Device
Package
Range (T )
A
PCZ33781EK/R2
-40°C to 90°C
32 SOICW EP
+5.0V
+25V
33781
VCC
SCLK
CS
VCC
VSUP1
DPH
DPL
D0H
D0L
1.0μF
DBUS SLAVE
SCLK0
CS0
DBUS SLAVE
DBUS SLAVE
DBUS SLAVE
DBUS SLAVE
MCU1
MOSI
MISO
RST
MOSI0
MISO0
RST
D1H
D1L
CLK
CLK
GND
D2H
D2L
VDD
0.1μF
VSS_IDDQ
SCLK1
D3H
D3L
SCLK1
MISO1
CS1
MISO1
MCU2
CS1
AGND GND
VSS
2.2nF capacitors from DOH, D0L,
D1H, D1L, D2H, D2L, D3H and D3L
to circuit ground are required for
proper operation
GND
Figure 1. 33781 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007-2008. All rights reserved.