Document Number: MW4IC2230N
Rev. 6, 5/2006
Freescale Semiconductor
Technical Data
RF LDMOS Wideband Integrated
Power Amplifiers
The MW4IC2230N wideband integrated circuit is designed for W-CDMA
base station applications. It uses Freescale’s newest High Voltage (26 to 28
Volts) LDMOS IC technology and integrates a multi-stage structure. Its
wideband on-chip design makes it usable from 1600 to 2400 MHz. The linearity
performances cover all modulations for cellular applications: GSM, GSM
EDGE, TDMA, CDMA and W-CDMA.
MW4IC2230NBR1
MW4IC2230GNBR1
2110-2170 MHz, 30 W, 28 V
SINGLE W-CDMA
RF LDMOS WIDEBAND
Final Application
• Typical Single-Carrier W-CDMA Performance: VDD = 28 Volts, IDQ1
=
60 mA, IDQ2 = 350 mA, Pout = 5 Watts Avg., f = 2140 MHz, Channel
INTEGRATED POWER AMPLIFIERS
Bandwidth = 3.84 MHz, PAR = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain — 31 dB
Drain Efficiency — 15%
ACPR @ 5 MHz = -45 dBc in 3.84 MHz Bandwidth
Driver Application
• Typical Single-Carrier W-CDMA Performance: VDD = 28 Volts, I
=
60 mA, IDQ2 = 350 mA, Pout = 0.4 Watts Avg., f = 2140 MHz, ChDanQn1el
Bandwidth = 3.84 MHz, PAR = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain — 31.5 dB
CASE 1329-09
TO-272 WB-16
PLASTIC
ACPR @ 5 MHz = -53.5 dBc in 3.84 MHz Bandwidth
MW4IC2230NBR1
• Capable of Handling 3:1 VSWR, @ 28 Vdc, 2170 MHz, 5 Watts CW
Output Power
• Stable into a 3:1 VSWR. All Spurs Below -60 dBc @ 10 mW to 5 W CW
Pout
.
Features
• Characterized with Series Equivalent Large-Signal Impedance Parameters
• On-Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output)
CASE 1329A-03
TO-272 WB-16 GULL
PLASTIC
• Integrated Quiescent Current Temperature Compensation
MW4IC2230GNBR1
with Enable/Disable Function
• On-Chip Current Mirror gm Reference FET for Self Biasing Application (1)
• Integrated ESD Protection
• 200°C Capable Plastic Package
• N Suffix Indicates Lead-Free Terminations. RoHS Compliant.
• In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel
1
2
3
4
5
V
GND
RD1
16
15
GND
V
V
V
DS2
RD1
RG1
V
RG1
V
DS1
V
V
DS2
V
DS3/
RF
RF
in
DS1
3 Stages I
6
14
C
out
7
8
9
10
V
GS1
V
GS2
V
GS3
RF
in
V /RF
DS3 out
13
12
GND
11
GND
V
GS1
V
GS2
V
GS3
Quiescent Current
Temperature Compensation
(Top View)
Note: Exposed backside flag is source
terminal for transistors.
Figure 1. Functional Block Diagram
Figure 2. Pin Connections
1. Refer to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1987.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
MW4IC2230NBR1 MW4IC2230GNBR1
RF Device Data
Freescale Semiconductor
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