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74LVT244SJ PDF预览

74LVT244SJ

更新时间: 2024-02-14 10:04:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管信息通信管理
页数 文件大小 规格书
8页 87K
描述
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

74LVT244SJ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.01
控制类型:ENABLE LOW系列:LVT
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.8015 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.9 ns传播延迟(tpd):4.2 ns
认证状态:Not Qualified座面最大高度:2.642 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.493 mmBase Number Matches:1

74LVT244SJ 数据手册

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July 1999  
Revised August 1999  
74LVT244 •74LVTH244  
Low Voltage Octal Buffer/Line Driver  
with 3-STATE Outputs  
General Description  
Features  
Input and output interface capability to systems at  
The LVT244 and LVTH244 are octal buffers and line drivers  
designed to be employed as memory address drivers,  
clock drivers and bus oriented transmitters or receivers  
which provide improved PC board density.  
5V VCC  
Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs (74LVTH244),  
also available without bushold feature (74LVT244)  
The LVTH244 data inputs include bushold, eliminating the  
need for external pull-up resistors to hold unused inputs.  
Live insertion/extraction permitted  
These octal buffers and line drivers are designed for low-  
voltage (3.3V) VCC applications, but with the capability to  
Power Up/Down high impedance provides glitch-free  
bus loading  
provide a TTL interface to a 5V environment. The LVT244  
and LVTH244 are fabricated with an advanced BiCMOS  
technology to achieve high speed operation similar to 5V  
ABT while maintaining low power dissipation.  
Outputs source/sink 32 mA/+64 mA  
Functionally compatible with the 74 series 244  
Latch-up performance exceeds 500 mA  
Ordering Code:  
Order Number  
74LVT244WM  
74LVT244SJ  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
M20D  
74LVT244MSA  
74LVT244MTC  
74LVTH244WM  
74LVTH244SJ  
74LVTH244MSA  
74LVTH244MTC  
MSA20  
MTC20  
M20B  
M20D  
MSA20  
MTC20  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS500154  
www.fairchildsemi.com  

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