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74ACT715SCX_NL

更新时间： 2024-02-26 20:57:37

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
18页	424K
描述
Consumer Circuit, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013, SOIC-20

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74ACT715SCX_NL 技术参数

生命周期：	Obsolete	包装说明：	SOP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.6	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	R-PDSO-G20	长度：	12.8 mm
功能数量：	1	端子数量：	20
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
认证状态：	Not Qualified	座面最大高度：	2.65 mm
最大压摆率：	0.08 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	7.5 mm	Base Number Matches：	1

74ACT715SCX_NL 数据手册

April 2007

74ACT715, 74ACT715-R

Programmable Video Sync Generator

Features

General Description

■ Maximum Input Clock Frequency > 130MHz

■ Interlaced and non-interlaced formats available

The ACT715 and ACT715-R are 20-pin TTL-input

compatible devices capable of generating Horizontal,

Vertical and Composite Sync and Blank signals for tele-

visions and monitors. All pulse widths are completely

definable by the user. The devices are capable of gener-

ating signals for both interlaced and noninterlaced

modes of operation. Equalization and serration pulses

can be introduced into the Composite Sync signal when

needed.

■ Separate or composite horizontal and vertical Sync

and Blank signals available

■ Complete control of pulse width via register

programming

■ All inputs are TTL compatible

■ 8mA drive on all outputs

■ Default RS170/NTSC values mask programmed into

Four additional signals can also be made available when

Composite Sync or Blank are used. These signals can

be used to generate horizontal or vertical gating pulses,

cursor position or vertical Interrupt signal.

registers

■ ACT715-R is mask programmed to default to a Clock

Enable state for easier start-up into 14.31818MHz

RS170 timing

These devices make no assumptions concerning the

system architecture. Line rate and field/frame rate are all

a function of the values programmed into the data regis-

ters, the status register, and the input clock frequency.

The ACT715 is mask programmed to default to a Clock

Disable state. Bit 10 of the Status Register, Register 0,

defaults to a logic “0”. This facilitates (re)programming

before operation.

The ACT715-R is the same as the ACT715 in all

respects except that the ACT715-R is mask pro-

grammed to default to a Clock Enabled state. Bit 10 of

the Status Register defaults to a logic “1”. Although

completely (re)programmable, the ACT715-R version is

better suited for applications using the default

14.31818MHz RS-170 register values. This feature

allows power-up directly into operation, following a single

CLEAR pulse.

Ordering Information

Package

Order Number

74ACT715SC

Number

Package Description

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74ACT715-RSC

M20B

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

FACT™ is a trademark of Fairchild Semiconductor Corporation.

74ACT715, 74ACT715-R Rev. 1.3

www.fairchildsemi.com

12 3 4 5 6 7...18

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与74ACT715SCX_NL相关器件

型号	品牌	描述	获取价格	数据表
74ACT715S-RSC	FAIRCHILD	Programmable Video Sync Generator	获取价格
74ACT715SX	TI	SPECIALTY CONSUMER CIRCUIT, PDSO20, 0.300 INCH, PLASTIC, SOIC-20	获取价格
74ACT723DCQR	FAIRCHILD	FIFO, 64X9, Synchronous, CMOS, CDIP28, CERAMIC, DIP-28	获取价格
74ACT723FCTR	FAIRCHILD	FIFO, 64X9, Synchronous, CMOS, CDFP28, FP-28	获取价格
74ACT723FCXR	FAIRCHILD	FIFO, 64X9, Synchronous, CMOS, CDFP28, FP-28	获取价格
74ACT723LC	FAIRCHILD	FIFO, 64X9, Synchronous, CMOS, CQCC28, CERAMIC, LCC-28	获取价格

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