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100331QC PDF预览

100331QC

更新时间: 2024-02-15 16:04:10
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路输入元件
页数 文件大小 规格书
10页 103K
描述
Low Power Triple D-Type Flip-Flop

100331QC 技术参数

生命周期:Contact Manufacturer包装说明:QFF,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.59Is Samacsys:N
系列:100KJESD-30 代码:S-GQFP-F24
长度:9.398 mm逻辑集成电路类型:D FLIP-FLOP
位数:1功能数量:3
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出特性:OPEN-EMITTER
输出极性:COMPLEMENTARY封装主体材料:CERAMIC, GLASS-SEALED
封装代码:QFF封装形状:SQUARE
封装形式:FLATPACK传播延迟(tpd):2.4 ns
筛选级别:MIL-PRF-38535 Class V座面最大高度:2.159 mm
表面贴装:YES技术:ECL
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:QUAD
触发器类型:POSITIVE EDGE宽度:9.398 mm
最小 fmax:400 MHzBase Number Matches:1

100331QC 数据手册

 浏览型号100331QC的Datasheet PDF文件第2页浏览型号100331QC的Datasheet PDF文件第3页浏览型号100331QC的Datasheet PDF文件第4页浏览型号100331QC的Datasheet PDF文件第5页浏览型号100331QC的Datasheet PDF文件第6页浏览型号100331QC的Datasheet PDF文件第7页 
February 1990  
Revised August 2000  
100331  
Low Power Triple D-Type Flip-Flop  
General Description  
The 100331 contains three D-type, edge-triggered master/  
slave flip-flops with true and complement outputs, a Com-  
mon Clock (CPC), and Master Set (MS) and Master Reset  
Features  
35% power reduction of the 100131  
2000V ESD protection  
Pin/function compatible with 100131  
(MR) inputs. Each flip-flop has individual Clock (CPn),  
Direct Set (SDn) and Direct Clear (CDn) inputs. Data enters  
a master when both CPn and CPC are LOW and transfers  
to a slave when CPn or CPC (or both) go HIGH. The Master  
Set, Master Reset and individual CDn and SDn inputs over-  
Voltage compensated operating range = −4.2V to 5.7V  
Available to industrial grade temperature range  
ride the Clock inputs. All inputs have 50 kpull-down  
resistors.  
Ordering Code:  
Order Number Package Number  
Package Description  
100331SC  
100331PC  
100331QC  
100331QI  
M24B  
N24E  
V28A  
V28A  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square  
Industrial Temperature Range (40°C to +85°C)  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagrams  
24-Pin DIP/SOIC  
Pin Descriptions  
Pin Names  
Description  
Individual Clock Inputs  
Common Clock Input  
28-Pin PLCC  
CP0CP2  
CPC  
D0D2  
CD0CD2  
SDn  
Data Inputs  
Individual Direct Clear Inputs  
Individual Direct Set Inputs  
Master Reset Input  
Master Set Input  
MR  
MS  
Q0-Q2  
Q0Q2  
Data Outputs  
Complementary Data Outputs  
© 2000 Fairchild Semiconductor Corporation  
DS010262  
www.fairchildsemi.com  

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