Datasheet > MX98725

MX98725

更新时间： 2024-02-06 20:53:47

品牌	Logo	应用领域
其他 - ETC		外围集成电路数据传输控制器 PC 局域网以太网以太网：16GBASE-T 时钟
页数	文件大小	规格书
33页	178K
描述
SINGLE CHIP FAST ETHERNET NIC CONTROLLER

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MX98725 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QFP, QFP160,1.2SQ
针数：	16	Reach Compliance Code：	unknown
HTS代码：	8542.31.00.01	风险等级：	5.92
Is Samacsys：	N	地址总线宽度：	32
边界扫描：	NO	总线兼容性：	PCI
最大时钟频率：	25 MHz	最大数据传输速率：	12.5 MBps
外部数据总线宽度：	32	JESD-30 代码：	S-PQFP-G16
JESD-609代码：	e0	长度：	28 mm
低功率模式：	YES	串行 I/O 数：	1
端子数量：	16	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP160,1.2SQ
封装形状：	SQUARE	封装形式：	FLATPACK
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	3.35 mm
子类别：	Serial IO/Communication Controllers	最大压摆率：	170 mA
最大供电电压：	5.25 V	最小供电电压：	4.75 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	28 mm
uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN	Base Number Matches：	1

MX98725 数据手册

PRELIMINARY

MX98725

SINGLE CHIP FAST ETHERNET NIC CONTROLLER

1. FEATURES

•

A single chip solution integrates 100/10 Base-T fast

Ethernet MAC, PHY and PMD

Fully comply to IEEE 802.3u specification

Operates over 100 meters of STP and category 5

UTP cable

Support full and half duplex operation in both 100

Base-TX and 10 Base-T mode

Fully comply to PCI spec. 2.1 with bus clock ranges

from 16MHz to 33MHz

Fully comply to Advanced Configuration and Power

Interface (ACPI) Rev 1.0

Fully comply to PCI Bus Power Management Inter-

face spec. Rev 1.0

Magic Packet TM mode to support Remote-Power

On and Remote-Wake-Up.

100/10 Base-T NWAY auto negotiation function

Large on chip FIFOs for both transmit and receive

operations without external local memory

•

Bus master architecture with linked host buffers

delivers the most optimized performance

32-bit bus master DMA channel provides ultra low

CPU utilization

Proprietary Adaptive Network Throughput Control

(ANTC) technology to optimize data integrity and

throughput

•

Support up to 256K bytes boot ROM and FLASH

interface

•

Three levels of loopback diagnostic capability

Support a variety of flexible address filtering modes

with 16 CAM address and 512 bits hash

MicroWire interface to EEPROM for customer's IDs

and configuration data

•

Single +5.0V power supply, standard CMOS tech-

nology, 160 pin PQFP package

•

( Magic Packet technology is a trademark of Advanced

Micro Device Corp.)

2. GENERAL DESCRIPTIONS

The MX98725 contains a PCI local bus glueless inter-

face, a Direct Memory Access (DMA) buffer manage-

ment unit, an IEEE802.3u-compliant Media Access Con-

troller (MAC), large Transmit and Receive FIFOs, and

an on-chip 10 Base-T and 100 Base-TX transceiver sim-

plifying system design and improving high speed signal

quality. Full-duplex operation are supported in both 10

Base-T and 100 Base-TX modes that increases the

controller's operating bandwidth up to 200Mbps.

Equipped with intelligent IEEE802.3u-compliant auto-

negotiation, the MX98725-based adapter allows a single

RJ-45 connector to link with the other IEEE802.3u-com-

pliant device completely without any need to set con-

figuration.

The MX98725, second generation of 100/10 Base-T

single chip MAC controller, is designed specifically to

meet future demand on Fast Ethernet networking sys-

tem.Different from MX98715/715a3, MX98725 addition-

ally supports ACPI, Remote-Wake-Up, Remote-Power-

On, and up to 256K Bytes Flash interface to enhance

product's added-on value.

The MX9725 controller is an IEEE802.3u compliant

single chip 32-bit full duplex, 10/100Mbps highly inte-

grated Fast Ethernet combo solution, designed to ad-

dress high performance local area networking (LAN)

system application requirements.

The bus master architecture delivers the performance

needed for today high speed and powerful processors

technology. In other words, the MX98725 not only keeps

CPU utilization low while maximizing data throughput,

but it also optimizes the PCI bandwidth providing the

highest PCI bandwidth utilization. To further reduce

ownership costs the MX98725 uses drivers that are

backward-compatible with the original MXIC MX98713

series controllers.

In MX98725, an innovative and proprietary design

"Adaptive NetworkThroughput Control" (ANTC) is built-

in to configure itself automatically by MXIC's driver based

on the PCI burst throughput of different PCs. With this

proprietary design, MX98725 can always optimize its

operating bandwidth, network data integrity and through-

put for different PCs.

P/N:PM0488

REV. 1.7, SEP. 15, 1998

12 3 4 5 6 7...33

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与MX98725相关器件

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MX98726	Macronix	SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE	获取价格
MX98726AEC	ETC	Controller Miscellaneous - Datasheet Reference	获取价格
MX98726EC	Macronix	SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE	获取价格
MX98727	ETC	SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER	获取价格
MX98727BEC	Macronix	LAN Controller, 1 Channel(s), 12.5MBps, CMOS, PQFP128, PLASTIC, LQFP-128	获取价格
MX98728	ETC	GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION	获取价格

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