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DS2165N PDF预览

DS2165N

更新时间: 2024-01-03 14:19:08
品牌 Logo 应用领域
达拉斯 - DALLAS PC
页数 文件大小 规格书
17页 322K
描述
ADPCM Codec, A/MU-Law, 1-Func, PDIP24,

DS2165N 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCJ,针数:28
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.62Is Samacsys:N
压伸定律:A/MU-LAW滤波器:NO
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.5062 mm湿度敏感等级:1
功能数量:1端子数量:28
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:4.57 mm
标称供电电压:5 V表面贴装:YES
电信集成电路类型:ADPCM CODEC温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.5062 mm
Base Number Matches:1

DS2165N 数据手册

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DS2165Q  
16/24/32kbps ADPCM Processor  
www.maxim-ic.com  
FEATURES  
PIN ASSIGNMENT (Top View)  
C Compresses/expands 64kbps PCM voice  
to/from either 32kbps, 24kbps, or 16kbps  
C Dual fully independent channel architecture;  
device can be programmed to perform either:  
two expansions  
4
3
2
1
28 27 26  
25  
5
6
7
8
NC  
A0  
A1  
FSY  
YOUT  
CS  
24  
23  
two compressions  
22  
21  
20  
19  
DS2165Q  
A2  
A3  
A4  
A5  
SDI  
9
SCLK  
XOUT  
NC  
one expansion and one compression  
C Interconnects directly to combo-codec  
devices  
10  
11  
12 13 14 15 16 17 18  
C Input to output delay is less than 375s  
C Simple serial port used to configure the  
device  
28-Pin PLCC  
C On-board time-slot assigner-circuit (TSAC)  
function allows data to be input/output at  
various time slots  
C Supports Channel Associated Signaling  
C Each channel can be independently idled or  
placed into bypass  
C Available hardware mode requires no host  
processor; ideal for voice storage  
applications  
C Single +5V supply; low-power CMOS  
technology  
C Available in 28-pin PLCC  
C 3V operation version is available  
(DS2165QL)  
DESCRIPTION  
The DS2165Q ADPCM processor chip is a dedicated digital-signal-processing (DSP) chip that has been  
optimized to perform adaptive-differential pulse-code modulation (ADPCM) speech compression at three  
different rates. The chip can be programmed to compress (expand) 64kbps voice data down to (up from)  
either 32kbps, 24kbps, or 16kbps. The compression to 32kbps follows the algorithm specified by CCITT  
Recommendation G.721 (July 1986) and ANSI document T1.301 (April 1987). The compression to  
24kbps follows ANSI document T1.303. The compression to 16kbps follows a proprietary algorithm  
developed by Dallas Semiconductor. The DS2165Q can switch compression algorithms on-the-fly. This  
allows the user to make maximum use of the available bandwidth on a dynamic basis.  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple  
revisions of any device may be simultaneously available through various sales channels. For information about device errata,  
click here: http://www.maxim-ic.com/errata.  
1 of 17  
070802  

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