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CYW15G0201DXB-BBC PDF预览

CYW15G0201DXB-BBC

更新时间: 2024-02-28 17:20:42
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赛普拉斯 - CYPRESS /
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46页 657K
描述
Dual-channel HOTLink II⑩ Transceiver

CYW15G0201DXB-BBC 数据手册

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CYP15G0201DXB  
CYV15G0201DXB  
CYW15G0201DXB  
Dual-channel HOTLink II™ Transceiver  
— Internal DC-restoration  
Features  
• Dual differential PECL-compatible serial outputs per  
• Second-generation HOTLink® technology  
channel  
• Compliant to multiple standards  
— ESCON, DVB-ASI, Fibre Channel and Gigabit  
Ethernet (IEEE802.3z)  
CPRI™ compliant  
— CYW15G0201DXB compliant to OBSAI-RP3  
Source matched for 50transmission lines  
— No external bias resistors required  
— Signaling-rate controlled edge-rates  
• Compatible with  
— Fiber-optic modules  
— Copper cables  
Circuit board traces  
• JTAG boundary scan  
• Built-In Self-Test (BIST) for at-speed link testing  
• Per-channel Link Quality Indicator  
— Analog signal detect  
— Digital signal detect  
• Low power 1.8W @ 3.3V typical  
• Single 3.3V supply  
• 196-ball BGA  
• Pb-Free package option available  
0.25µ BiCMOS technology  
— CYV15G0201DXB compliant to SMPTE 259M and  
SMPTE 292M  
8B/10B encoded or 10-bit unencoded data  
• Dual channel transceiver operates from 195 to  
1500 MBaud serial data rate  
— CYW15G0201DXBoperatesfrom195to1540 MBaud  
serial data rate  
— Aggregate throughput of 6 GBits/second  
• Selectable parity check/generate  
• Selectable dual-channel bonding option  
— One 16-bit channels  
• Skew alignment support for multiple bytes of offset  
• Selectable input/output clocking options  
• MultiFrame™ Receive Framer  
Functional Description  
— Bit and Byte alignment  
Comma or full K28.5 detect  
Single- or multi-byte framer for byte alignment  
— Low-latency option  
The CYP(V)15G0201DXB[1] Dual-channel HOTLink II™  
Transceiver is a point-to-point or point-to-multipoint communi-  
cations building block allowing the transfer of data over  
high-speed serial links (optical fiber, balanced, and unbal-  
anced copper transmission lines) at signaling speeds ranging  
from 195- to 1500-MBaud per serial link.  
The CYV15G0201DXB satisfies the SMPTE 259M and  
SMPTE 292M compliance as per the EG34-1999 Pathological  
Test Requirements.  
• Synchronous LVTTL parallel interface  
• Internal phase-locked loops (PLLs) with no external  
PLL components  
• Optional Phase-Align Buffer in transmit path  
• Optional Elasticity Buffer in receive path  
• Dual differential PECL-compatible serial inputs per  
channel  
10  
10  
10  
Serial Links  
10  
10  
10  
10  
10  
Serial Links  
Backplane or  
Cabled  
Connections  
Figure 1. HOTLink II™ System Connections  
Note:  
1. CYV15G0201DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYW15G0201DXB refers to OBSAI RP3 compliant devices (maximum  
operating data rate is 1540 MBaud). CYP15G0201DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements and  
also OBSAI RP3 operating datarate of 1536 MBaud. CYP(V)(W)15G0201DXB refers to all three devices.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-02058 Rev. *H  
Revised March 25, 2005  

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