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CYP15G0402DXB-BGI

更新时间： 2024-02-19 12:36:52

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		电信集成电路电信电路信息通信管理
页数	文件大小	规格书
29页	615K
描述
Quad HOTLink II⑩ SERDES

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CYP15G0402DXB-BGI 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	27 X 27 MM, 1.52 MM HEIGHT, THERMALLY ENHANCED, BGA-256	针数：	256
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.92	Is Samacsys：	N
JESD-30 代码：	S-PBGA-B256	JESD-609代码：	e0
长度：	27 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	256
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装等效代码：	BGA256,20X20,50	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	225
电源：	1.5,3.3 V	认证状态：	Not Qualified
座面最大高度：	1.745 mm	子类别：	Other Telecom ICs
标称供电电压：	3.3 V	表面贴装：	YES
技术：	BICMOS	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	27 mm	Base Number Matches：	1

CYP15G0402DXB-BGI 数据手册

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CYP15G0402DXB

CYV15G0402DXB

Quad HOTLink II™ SERDES

—Circuit board traces

• JTAG boundary scan

• Built-In Self-Test (BIST) for at-speed link testing

• Per-channel Link Quality Indicator

— Analog signal detect

— Digital signal detect

• Low-power 2.5W @3.3V typical

• Single 3.3V supply

Features

• Second-generation HOTLink^®technology

• Compliant to multiple standards

—Fibre Channel, Gigabit Ethernet (IEEE802.3z), ES-

CON^®and DVB-ASI

— CYV15G0402DXB compliant to SMPTE 259M and

SMPTE 292M

• Quad-channel transceiver operates from 195 to 1500

Mbps serial data rate

• 256-ball thermally enhanced BGA

• Pb-Free package option available

• 0.25µ BiCMOS technology

— Aggregate throughput of 12 Gbps

• 10-bit unencoded data transport

• Selectable parity check/generate

Functional Description

• Four independent 10-bit channels with separate Clock

The CYP(V)15G0402DXB^[1]Quad HOTLink II™ SERDES is a

point-to-point communications building block allowing the

transfer of preencoded data over high-speed serial links

(optical fiber, balanced, and unbalanced copper transmission

lines) at signaling speeds ranging from 195 to 1500 MBaud per

serial link.

and Data Recovery for each channel

• Selectable input clocking options

• MultiFrame™ Receive Framer

—Comma or full K28.5 detect

— Single or Multi-Byte framer for byte alignment

— Low-latency option

Each transmit channel accepts preencoded 10-bit trans-

mission characters in an Input Register, serializes each

character, and drives it out a PECL-compatible differential line

driver. Each receive channel accepts a serial data stream at a

differential line receiver, deserializes the stream into 10-bit

characters, optionally frames these characters to the proper

10-bit character boundaries and presents these characters to

an Output register. Figure 1 illustrates typical connections

between independent systems and a CYP(V)15G0402DXB.

• Synchronous LVTTL parallel interface

• Internal phase-locked loops (PLLs) with no external

PLL components

• Optional Phase Align Buffer in Transmit Path

• Differential PECL-compatible serial inputs

• Differential PECL-compatible serial outputs

— Source matched for 50Ω transmission lines

The CYV15G0402DXB satisfies the SMPTE-259M and

SMPTE-292M compliance as per the EG34-1999 Pathological

Test Requirements.

— No external resistors required

—Signaling rate controlled edge rates

• Compatible with

— Fiber-optic modules

—Copper cables

Independent

Serial Links

Channel

Transceiver

Independent

Channel

Serial Links

Transceiver

Independent

Channel

Serial Links

Transceiver

Independent

Channel

Transceiver

Cable or

Optical

Connections

Figure 1. CYP(V)15G0402DXB HOTLink II™ System Connections

Note:

1. CYV15G0402DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYP15G0402DXB refers to devices that are not compliant to SMPTE 259M

and SMPTE 292M pathological test requirements. CYP(V)15G0402DXB refers to both devices.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-02057 Rev. *G

Revised March 31, 2005

12 3 4 5 6 7...29

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与CYP15G0402DXB-BGI相关器件

型号	品牌	描述	获取价格	数据表
CYP15G0402DXB-BGXC	CYPRESS	Quad HOTLink II⑩ SERDES	获取价格
CYP15G0402DXB-BGXC	ROCHESTER	SPECIALTY TELECOM CIRCUIT, PBGA256, 27 X 27 MM, 1.57 MM HEIGHT, LEAD FREE, TBGA-256	获取价格
CYP15G0402DXB-BGXI	CYPRESS	Quad HOTLink II⑩ SERDES	获取价格
CYP15G0402DX-BGC	CYPRESS	Quad HOTLinkII SERDES	获取价格
CYP15G0402DX-BGI	CYPRESS	Quad HOTLinkII SERDES	获取价格
CYP15G0403DXB	CYPRESS	Independent Clock Quad HOTLink II⑩ Transceive	获取价格

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