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CYII5SC1300AB-HDC PDF预览

CYII5SC1300AB-HDC

更新时间: 2024-01-07 20:27:48
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 传感器图像传感器
页数 文件大小 规格书
40页 1675K
描述
1.3 MP CMOS Image Sensor

CYII5SC1300AB-HDC 数据手册

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IBIS5-B-1300 CYII5FM1300AB  
1.3 MP CMOS Image Sensor  
Description  
Table 1. Key Performance Parameters  
Parameter  
Active pixels  
Typical Value  
1280 (H) x 1024 (V)  
The IBIS5-B-1300 is a solid state CMOS image sensor that  
integrates the functionality of complete analog image acquisition,  
digitizer, and digital signal processing system on a single chip.  
This 1.3-mega pixel (1280 x 1024) CMOS active pixel sensor  
dedicated to industrial vision applications features both rolling  
and snapshot (or global) shutter. Full frame readout time is 36 ms  
(max. 27.5 fps), and readout speed are boosted by windowed  
region of interest (ROI) readout. Another feature includes the  
double and multiples slope functionality to capture high dynamic  
range scenes. The sensor is available in a Monochrome version  
or Bayer (RGB) patterned color filter array.  
Pixel size  
6.7 µm x 6.7 µm  
Optical format  
Shutter type  
2/3 inch  
Snapshot (global) shutter  
rolling shutter  
Maximum data rate /  
master clock  
40 MPS / 40 MHz  
Frame rate  
27 fps (1280 x 1024)  
106 fps (640 x 480)  
User programmable row and column start/stop positions allow  
windowing down to a 2x1 pixel window for digital zoom. Sub  
sampling or viewfinder mode reduces resolution while  
maintaining the constant field of view and an increased frame  
rate. An on-chip analog signal pipeline processes the analog  
video output of the pixel array. Double sampling (DS) eliminates  
the fixed pattern noise. The programmable gain and offset  
amplifier maps the signal swing to the ADC input range. A 10-bit  
ADC converts the analog data to a 10-bit digital word stream. The  
sensor uses a 2-wire, I2C™-compatible interface, a 3-wire serial  
parallel (SPI) interface, or a 16-bit parallel interface. It operates  
with a 3.3V power supply and requires only one master clock for  
operation up to 40 MHz. It is housed in an 84-pin ceramic LCC  
package.  
ADC resolution  
10-bit, on-chip  
Sensitivity (@ 650 nm)  
715 V.m2/W.s  
8.40 V/lux.s  
S/N ratio  
64 dB  
Full well charge  
Temporal noise  
Dark current  
62.500 e–  
40 e–  
7.22 mV/s  
Multiple slope  
High dynamic range  
Supply voltage  
Analog: 3.0V–4.5V  
Digital: 3.3V  
I/O: 3.3V  
Applications  
Power consumption  
Operating temperature  
Color filter array  
175 mW  
n Machine vision  
n Inspection  
–30°C to +65°C  
Mono  
RGB Bayer pattern  
n Robotics  
Packaging  
84-pins LCC  
n Traffic monitoring  
IBIS5-B-1300  
Cypress Semiconductor Corporation  
Document #: 38-05710 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 27, 2007  

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