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CY7C9335A-270AXC

更新时间： 2024-02-28 09:06:32
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 电信电信集成电路
页数 文件大小 规格书
8页 190K
描述
Telecom Circuit, 1-Func, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, MS-026, TQFP-100

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CY7C9335A-270AXC 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFP包装说明：14 X 14 MM, 1.40 MM HEIGHT, MS-026, TQFP-100
针数：100Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.67
JESD-30 代码：S-PQFP-G100JESD-609代码：e4
长度：14 mm湿度敏感等级：3
功能数量：1端子数量：100
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
认证状态：Not Qualified座面最大高度：1.6 mm
标称供电电压：5 V表面贴装：YES
技术：CMOS电信集成电路类型：TELECOM CIRCUIT
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：14 mm
Base Number Matches：1

CY7C9335A-270AXC 数据手册

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CY7C9335A  
SMPTE-259M/DVB-ASI  
Descrambler/Framer-Controller  
The inputs of the CY7C9335A are designed to be directly  
mated to a CY7B9334 HOTLink receiver, which converts the  
SMPTE-259M compatible high-speed serial data stream into  
10-bit parallel characters.  
Features  
• Fully compatible with SMPTE-259M  
• Fully compatible with DVB-ASI  
• Operates from a single +5V supply  
• 100-pin TQFP package  
This device performs both TRS (sync) detection and framing,  
data descrambling with the SMPTE-259M X9+X4+1 algorithm,  
and NRZI-to-NRZ decoding. These functions operate at a 27  
MHz character rate. For those systems operating with  
non-SMPTE-259M compliant video streams (or for diagnostic  
purposes), the descrambler and NRZI decoding functions can  
be disabled.  
• Decodes 10-bit parallel digital streams for 27M  
characters/sec (270 Mbits/sec serial)  
• Operates with CY7B9334 SMPTE HOTLink® deseri-  
alizer/receiver  
• X9 + X4 + 1 descrambler and NRZI-to-NRZ decoder may  
be bypassed for raw data output  
DVB-ASI Operation  
The CY7C9335A also contains the necessary multiplexers,  
control inputs and outputs, to control a DVB-ASI-compliant  
video stream. DVB-ASI operation is enabled through  
activation of a single input signal. This allows a single  
serial-to-parallel input port to support both SMPTE and DVB  
data streams under software or hardware control.  
Functional Description  
SMPTE-259M Operation  
The CY7C9335A is a CMOS integrated circuit designed to  
decode SMPTE-125M bit-parallel digital characters (or other  
data formats) using the SMPTE-259M decoding rules.  
Following decoding, the characters are framed by locating the  
30-bit TRS pattern in the parallel character stream. The  
framed characters are then output.  
In DVB-ASI mode the CY7C9335A automatically enables both  
the 8B/10B decoder and multibyte framer present in the  
CY7B9334 receiver/deserializer. All error detection, fill, and  
command codes are detected and output by the CY7C9335A.  
The CY7C9335A operates from a single +5V supply. It is  
available in a 100-pin TQFP space saving package.  
Logic Block Diagram  
D9(RVS)  
RF  
D
A/B  
8
D7  
D6  
PD9(SVS)  
19  
4
10  
PD  
8
D5  
PD7  
10  
10  
11  
10  
D4  
D3  
PD6  
PD5  
PD4  
PD3  
PD2  
D2  
D1  
D0(SC/D)  
PD  
1
PD(SC/D)  
0
SYNC_EN  
BYPASS  
DVB_EN  
H_SYNC  
SYNC_ERR  
CKR  
OE  
Cypress Semiconductor Corporation  
Document #: 38-02083 Rev. *A  
•
3901 North First Street  
•
San Jose, CA 95134  
•
408-943-2600  
Revised March 19, 2010  
[+] Feedback  
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