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7C192-15 PDF预览

7C192-15

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
10页 164K
描述
64K x 4 Static RAM with Separate I/O

7C192-15 数据手册

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92  
CY7C192  
64K x 4 Static RAM  
with Separate I/O  
pansion is provided by active LOW Chip Enable (CE) and  
three-state drivers. It has an automatic power-down feature,  
reducing the power consumption by 75% when deselected.  
Features  
• High speed  
— 12 ns  
Writing to the device is accomplished when the Chip Enable  
(CE) and write enable (WE) inputs are both LOW.  
• CMOS for optimum speed/power  
• Low active power  
Data on the four input pins (I0 through I3) is written into the  
memory location specified on the address pins (A0 through  
A15).  
— 880 mW  
• Low standby power  
— 220 mW  
Reading the device is accomplished by taking the Chip Enable  
(CE) LOW while the Write Enable (WE) remains HIGH. Under  
these conditions the contents of the memory location specified  
on the address pins will appear on the four data output pins.  
• TTL-compatible inputs and outputs  
• Automatic power-down when deselected  
The output pins stay in high-impedance state when Write En-  
able (WE) is LOW, or Chip Enable (CE) is HIGH.  
Functional Description  
The CY7C192 is a high-performance CMOS static RAM orga-  
nized as 65,536 x 4 bits with separate I/O. Easy memory ex-  
A die coat is used to insure alpha immunity.  
Logic Block Diagram  
Pin Configurations  
I
0
I
1
LCC  
Top View  
DIP/SOJ  
Top View  
I
2
1
A
V
6
CC  
28  
I
3
2
3
4
A
A
5
7
27  
26  
25  
3
2 1 2827  
26  
A
8
A
4
4
A
A
A
A
A
A
I
9
4
3
2
1
0
A
9
A
3
5
6
7
8
25  
24  
23  
22  
21  
20  
19  
18  
A
INPUT BUFFER  
10  
A
10  
A
11  
5
6
A
12  
24  
A
2
11  
A
23  
A
A
1
0
A
A
A
13  
14  
15  
A
A
7
8
9
10  
12  
13  
22  
A
A
1
0
9
O
O
0
3
A
21  
20  
19  
18  
17  
16  
I
3
2
10  
11  
12  
I
2
A
A
A
I
2
14  
3
I
0
O
O
3
2
A
O
O
4
15  
1
1024 x 64 x 4  
ARRAY  
I
1
3
A
1314151617  
I
0
5
A
11  
12  
13  
14  
2
6
A
I
O
O
WE  
1
1
O
O
C1913  
2
7
A
CE  
0
8
A
GND  
15  
3
9
C1912  
POWER  
DOWN  
COLUMN  
DECODER  
CE  
7C192 ONLY  
WE  
C1911  
Selection Guide  
7C192-12  
7C192-15  
7C192-20  
7C192-25  
Maximum Access Time (ns)  
12  
155  
30  
15  
145  
30  
20  
135  
30  
25  
115  
30  
Maximum Operating Current (mA)  
Maximum Standby Current (mA)  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-05047 Rev. **  
Revised August 24, 2001  

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