5秒后页面跳转
5962-8866204NA PDF预览

5962-8866204NA

更新时间: 2024-01-30 20:23:36
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
13页 237K
描述
Standard SRAM, 32KX8, 45ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28

5962-8866204NA 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:28
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.19
最长访问时间:45 nsJESD-30 代码:R-CDIP-T28
JESD-609代码:e0内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:32KX8
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL认证状态:Not Qualified
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子位置:DUALBase Number Matches:1

5962-8866204NA 数据手册

 浏览型号5962-8866204NA的Datasheet PDF文件第2页浏览型号5962-8866204NA的Datasheet PDF文件第3页浏览型号5962-8866204NA的Datasheet PDF文件第4页浏览型号5962-8866204NA的Datasheet PDF文件第5页浏览型号5962-8866204NA的Datasheet PDF文件第6页浏览型号5962-8866204NA的Datasheet PDF文件第7页 
fax id: 1030  
CY7C199  
32K x 8 Static RAM  
provided by an active LOW chip enable (CE) and active LOW  
output enable (OE) and three-state drivers. This device has an  
automatic power-down feature, reducing the power consump-  
tion by 81% when deselected. The CY7C199 is in the standard  
300-mil-wide DIP, SOJ, and LCC packages.  
Features  
• High speed  
— 10 ns  
• Fast t  
DOE  
An active LOW write enable signal (WE) controls the writ-  
ing/reading operation of the memory. When CE and WE inputs  
• CMOS for optimum speed/power  
• Low active power  
are both LOW, data on the eight data input/output pins (I/O  
0
— 467 mW (max, 12 ns “L” version)  
• Low standby power  
through I/O ) is written into the memory location addressed by  
7
the address present on the address pins (A through A ).  
0
14  
Reading the device is accomplished by selecting the device  
and enabling the outputs, CE and OE active LOW, while WE  
remains inactive or HIGH. Under these conditions, the con-  
tents of the location addressed by the information on address  
pins are present on the eight data input/output pins.  
— 0.275 mW (max, “L” version)  
• 2V data retention (“L” version only)  
• Easy memory expansion with CE and OE features  
• TTL-compatible inputs and outputs  
• Automatic power-down when deselected  
The input/output pins remain in a high-impedance state unless  
the chip is selected, outputs are enabled, and write enable  
(WE) is HIGH. A die coat is used to improve alpha immunity.  
Functional Description  
The CY7C199 is a high-performance CMOS static RAM orga-  
nized as 32,768 words by 8 bits. Easy memory expansion is  
Logic Block Diagram  
Pin Configurations  
DIP / SOJ / SOIC  
Top View  
LCC  
Top View  
A
A
V
CC  
28  
27  
26  
5
1
2
3
4
5
6
WE  
6
3
2 1 2827  
26  
A
A
A
4
7
4
A
4
A
A
8
9
8
A
3
25  
24  
5
6
7
8
25  
24  
23  
22  
21  
20  
19  
18  
A
3
A
9
A
2
A
A
10  
2
A
10  
A
11  
23  
22  
A
1
A
11  
A
1
A
12  
OE  
7
OE  
A
9
13  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
A
A
A
I/O  
I/O  
I/O  
A
21  
20  
19  
18  
17  
16  
15  
12  
13  
14  
A
0
0
1
2
3
4
5
6
0
8
9
10  
11  
12  
13  
A
10  
11  
12  
14  
INPUT BUFFER  
CE  
I/O  
I/O  
CE  
I/O  
I/O  
I/O  
I/O  
I/O  
0
7
6
7
1
A
0
0
1
2
6
5
4
1314151617  
A
1
C199–3  
A
2
I/O  
I/O  
A
3
GND  
14  
3
A
4
C199–2  
1024 x 32 x 8  
ARRAY  
A
5
22  
OE  
A
A
A
0
21  
6
23  
24  
1
A
20  
CE  
I/O  
I/O  
6
I/O  
5
I/O  
I/O  
GND  
7
A
A
A
2
3
4
A
19  
18  
17  
16  
8
A
7
25  
26  
27  
28  
1
9
TSOP I  
Top View  
(not to scale)  
WE  
4
3
CE  
WE  
V
CC  
A
A
15  
14  
13  
POWER  
DOWN  
COLUMN  
DECODER  
5
6
7
2
3
I/O  
2
A
A
A
I/O  
7
12  
11  
I/O  
I/O  
A
1
0
OE  
4
5
8
9
C199–1  
10  
9
14  
A
6
7
10  
A
A
13  
12  
A
11  
8
C199–4  
Selection Guide  
7C199-8 7C199-10 7C199-12 7C199-15 7C199-20 7C199-25 7C199-35 7C199-45  
Maximum Access Time (ns)  
Maximum Operating  
8
10  
110  
90  
12  
160  
90  
15  
155  
90  
20  
150  
90  
25  
150  
80  
35  
140  
70  
45  
120  
140  
Current (mA)  
L
Maximum CMOS  
0.5  
0.5  
10  
10  
10  
10  
10  
10  
Standby Current (mA)  
L
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
Shaded area contains preliminary information.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
February 1988 – Revised April 22, 1998  

与5962-8866204NA相关器件

型号 品牌 描述 获取价格 数据表
5962-8866204NX TEMIC Standard SRAM, 32KX8, 45ns, CMOS, CDIP28,

获取价格

5962-8866204NX CYPRESS Standard SRAM, 32KX8, 45ns, CMOS, CDIP28, CERAMIC, DIP-28

获取价格

5962-8866204TA MICROSS Standard SRAM, 32KX8, 45ns, CMOS, CDFP28, CERAMIC, FP-28

获取价格

5962-8866204TC MICROSS Standard SRAM, 32KX8, 45ns, CMOS, CDFP28, CERAMIC, FP-28

获取价格

5962-8866204TX ETC x8 SRAM

获取价格

5962-8866204UA IDT Standard SRAM, 32KX8, 45ns, CMOS, CQCC28, LCC-28

获取价格