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ATA6624-PGPW PDF预览

ATA6624-PGPW

更新时间: 2024-01-15 11:19:51
品牌 Logo 应用领域
爱特美尔 - ATMEL 总线收发器稳压器网络接口电信集成电路电信电路
页数 文件大小 规格书
29页 471K
描述
LIN Bus Transceiver with 3.3V (5V) Regulator and Watchdog

ATA6624-PGPW 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:HVQCCN,
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.61JESD-30 代码:S-XQCC-N20
长度:5 mm功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态:Not Qualified
座面最大高度:1 mm表面贴装:YES
电信集成电路类型:INTERFACE CIRCUIT温度等级:AUTOMOTIVE
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD宽度:5 mm
Base Number Matches:1

ATA6624-PGPW 数据手册

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Features  
Master and Slave Operation Possible  
Supply Voltage up to 40V  
Operating voltage VS = 5V to 27V  
Typically 10 µA Supply Current During Sleep Mode  
Typically 57 µA Supply Current in Silent Mode  
Linear Low-drop Voltage Regulator:  
– Normal, Fail-safe, and Silent Mode  
ATA6622 VCC = 3.3V ±2%  
LIN Bus  
ATA6624 VCC = 5.0V ±2%  
ATA6626 VCC = 5.0V ±2%, TXD Time-out Timer Disabled  
– In Sleep Mode VCC is Switched Off  
Transceiver  
with 3.3V (5V)  
Regulator and  
Watchdog  
VCC- Undervoltage Detection (4 ms Reset Time) and Watchdog Reset Logical  
Combined at Open Drain Output NRES  
Negative Trigger Input for Watchdog  
Boosting the Voltage Regulator Possible with an External NPN Transistor  
LIN Physical Layer According to LIN 2.0 Specification and SAEJ2602-2  
Wake-up Capability via LIN-bus, Wake Pin, or Kl_15 Pin  
INH Output to Control an External Voltage Regulator or to Switch off the Master Pull Up  
Resistor  
ATA6622  
ATA6624  
ATA6626  
TXD Time-out Timer; ATA6626 TXD Time-out Timer Is Disabled  
Bus Pin is Overtemperature and Short Circuit Protected versus GND and Battery  
Adjustable Watchdog Time via External Resistor  
Advanced EMC and ESD Performance  
ESD HBM 8 kV at Pins LIN and VS According to STM5.1  
Package: QFN 5 mm × 5 mm with 20 Pins  
1. Description  
The ATA6622 is a fully integrated LIN transceiver, which complies with the LIN 2.0  
and SAEJ2602-2 specifications. It has a low-drop voltage regulator for 3.3V/50 mA  
output and a window watchdog. The ATA6624 has the same functionality as the  
ATA6622; however, it uses a 5V/50 mA regulator. The ATA6626 has the same func-  
tionality as ATA6624 without a TXD time-out timer. The voltage regulator is able to  
source 50 mA up to VS = 18V. The output current of the regulator can be boosted by  
using an external NPN transistor. This chip combination makes it possible to develop  
inexpensive, simple, yet powerful slave and master nodes for LIN-bus systems.  
ATA6622/ATA6624/ATA6626 are designed to handle the low-speed data communica-  
tion in vehicles, e.g., in convenience electronics. Improved slope control at the  
LIN-driver ensures secure data communication up to 20 kBaud. Sleep Mode and  
Silent Mode guarantee very low current consumption. The ATA6626 is able to switch  
the LIN unlimited to dominant level via TXD for low data rates.  
4986F–AUTO–07/08  

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