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5962D8956809VNC PDF预览

5962D8956809VNC

更新时间: 2024-01-13 00:57:57
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储先进先出芯片
页数 文件大小 规格书
20页 1848K
描述
Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO

5962D8956809VNC 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.17
Is Samacsys:N最长访问时间:30 ns
周期时间:40 nsJESD-30 代码:R-CDIP-T28
长度:27.94 mm内存密度:36864 bit
内存宽度:9功能数量:1
端子数量:28字数:4096 words
字数代码:4000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:4KX9可输出:NO
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL认证状态:Qualified
筛选级别:MIL-PRF-38535 Class V座面最大高度:3.94 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL总剂量:10k Rad(Si) V
宽度:7.62 mmBase Number Matches:1

5962D8956809VNC 数据手册

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Features  
First-in First-out Dual Port Memory  
4096-bit x 9 Organization  
Fast Flag and Access Times: 15, 30 ns  
Wide Temperature Range: -55°C to +125°C  
Fully Expandable by Word Width or Depth  
Asynchronous Read/Write Operations  
Empty, Full and Half Flags in Single Device Mode  
Retransmit Capability  
Bi-directional Applications  
Battery Backup Operation: 2V Data Retention  
TTL Compatible  
Rad. Tolerant  
High Speed  
4 Kb x 9  
Single 5V 10% Power Supply  
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2  
Tested up to a Total Dose of 30 krads (Si) according to MIL STD 883 Method 1019  
Quality grades : QML Q and V with SMD 5962-89568 and ESCCwith specification  
9301/049  
Parallel FIFO  
Description  
The M67204H implements a first-in first-out algorithm, featuring asynchronous  
read/write operations. The FULL and EMPTY flags prevent data overflow and under-  
flow. The expansion logic allows unlimited expansion in word size and depth with no  
timing penalties. Twin address pointers automatically generate internal read and write  
addresses, and no external address information is required for the Atmel FIFOs.  
address pointers are automatically incremented with the write pin and read pin. The 9  
bits wide data are used in data communications applications where a parity bit for  
error checking is necessary. The retransmit pin reset the read pointer to zero without  
affecting the write pointer. This is very useful for retransmitting data when an error is  
detected in the system.  
M67204H  
Using an array of eight transistors (8T) memory cell, the M67204H combines an  
extremely low standby supply current (typ = 0.1 µA) with a fast access time at 15 ns  
over the full temperature range. All versions offer battery backup data retention capa-  
bility with a typical power consumption at less than 2 µW.  
The M67204H is processed according to the methods of the latest revision of the MIL  
PRF 38535 (Q and V) or ESCC 9000.  
4141J–AERO–04/07  

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