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5962-9317706VUC PDF预览

5962-9317706VUC

更新时间: 2024-01-31 04:07:23
品牌 Logo 应用领域
TEMIC ATM异步传输模式先进先出芯片
页数 文件大小 规格书
22页 382K
描述
FIFO, 16KX9, 15ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28

5962-9317706VUC 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknown风险等级:5.83
最长访问时间:15 ns周期时间:25 ns
JESD-30 代码:R-CDIP-T28JESD-609代码:e4
内存密度:147456 bit内存宽度:9
功能数量:1端子数量:28
字数:16384 words字数代码:16000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:16KX9
可输出:NO封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
认证状态:Not Qualified座面最大高度:5.84 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:GOLD端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mm

5962-9317706VUC 数据手册

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Features  
First-in first-out dual port memory  
16384 x 9 organisation  
Fast Flag and access times: 15, 30 ns  
Wide temperature range: - 55 °C to + 125 °C  
Programmable Half Full Flag  
Fully expandable by word width or depth  
Asynchronous read/write operations  
Empty, full and half flags in single device mode  
Retransmit capability  
Bi-directional applications  
Battery back-up operation: 2V data retention  
TTL compatible  
Single 5V + 10% power supply  
QML Q and V with SMD 5962-93177  
Rad Tolerant  
High Speed  
16 x 9  
Description  
The M672061F implements a first-in first-out algorithm, featuring asynchronous  
read/write operations. The FULL and EMPTY flags prevent data overflow and under-  
flow. The Expansion logic allows unlimited expansion in word size and depth with no  
timing penalties. Twin address pointers automatically generate internal read and write  
addresses, and no external address information are required for the Atmel FIFOs.  
Address pointers are automatically incremented with the write pin and read pin. The 9  
bits wide data are used in data communications applications where a parity bit for  
error checking is necessary. The Retransmit pin resets the Read pointer to zero with-  
out affecting the write pointer. This is very useful for retransmitting data when an error  
is detected in the system.  
Parallel FIFO +  
Programmable  
Flag  
M672061F  
Using an array of eight transistors (8 T) memory cell, the M672061F combines an  
extremely low standby supply current (typ = 0.1 µA) with a fast access time at 15 ns  
over the full temperature range. All versions offer battery backup data retention capa-  
bility with a typical power consumption at less than 2 µW.  
For military/space applications that demand superior levels of performance and reli-  
ability the M672061F is processed according to the methods of the latest revision of  
the MIL PRF 38535 (Q and V) or ESA SCC 9000.  
Rev. E–20-Aug-01  
1

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