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A290011T-90 PDF预览

A290011T-90

更新时间: 2024-01-04 19:54:11
品牌 Logo 应用领域
联笙电子 - AMICC 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
32页 312K
描述
128K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

A290011T-90 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
零件包装代码:DIP包装说明:LEAD FREE, PLASTIC, DIP-32
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.54最长访问时间:90 ns
其他特性:TOP BOOT SECTOR启动块:TOP
命令用户界面:YES数据轮询:YES
JESD-30 代码:R-PDIP-T32长度:41.91 mm
内存密度:1048576 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:1,2,1,3端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP32,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
电源:5 V编程电压:5 V
认证状态:Not Qualified座面最大高度:5.334 mm
部门规模:8K,4K,16K,32K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:15.24 mm
Base Number Matches:1

A290011T-90 数据手册

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A29001/290011 Series  
128K X 8 Bit CMOS 5.0 Volt-only,  
Boot Sector Flash Memory  
Preliminary  
Features  
nTypical 100,000 program/erase cycles per sector  
n20-year data retention at 125°C  
n5.0V ± 10% for read and write operations  
nAccess times:  
- 55/70/90 (max.)  
nCurrent:  
- Reliable operation for the life of the system  
nCompatible with JEDEC-standards  
- 20 mA typical active read current  
- 30 mA typical program/erase current  
- 1 mA typical CMOS standby  
- Pinout and software compatible with single-power-  
supply Flash memory standard  
- Superior inadvertent write protection  
nFlexible sector architecture  
n
Polling and toggle bits  
- Provides a software method of detecting completion of  
program or erase operations  
Data  
- 8 Kbyte/ 4 KbyteX2/ 16 Kbyte/ 32 KbyteX3 sectors  
- Any combination of sectors can be erased  
- Supports full chip erase  
nErase Suspend/Erase Resume  
- Sector protection:  
- Suspends a sector erase operation to read data from,  
or program data to, a non-erasing sector, then  
resumes the erase operation  
A hardware method of protecting sectors to prevent  
any inadvertent program or erase operations within  
that sector  
nHardware reset pin (  
)
RESET  
nTop or bottom boot block configurations available  
nEmbedded Erase Algorithms  
- Hardware method to reset the device to reading array  
data (not available on A290011)  
- Embedded Erase algorithm will automatically erase the  
entire chip or any combination of designated sectors  
and verify the erased sectors  
nPackage options  
- 32-pin P-DIP, PLCC, or TSOP (Forward type)  
- Embedded Program algorithm automatically writes and  
verifies bytes at specified addresses  
General Description  
The device requires only a single 5.0 volt power supply for both  
read and write functions. Internally generated and regulated  
voltages are provided for the program and erase operations.  
The A29001 is entirely software command set compatible with  
the JEDEC single-power-supply Flash standard. Commands  
are written to the command register using standard  
microprocessor write timings. Register contents serve as input  
to an internal state-machine that controls the erase and  
programming circuitry. Write cycles also internally latch  
addresses and data needed for the programming and erase  
operations. Reading data out of the device is similar to reading  
from other Flash or EPROM devices.  
Device programming occurs by writing the proper program  
command sequence. This initiates the Embedded Program  
algorithm - an internal algorithm that automatically times the  
program pulse widths and verifies proper program margin.  
Device erasure occurs by executing the proper erase  
command sequence. This initiates the Embedded Erase  
The A29001 is a 5.0 volt-only Flash memory organized as  
131,072 bytes of 8 bits each. The A29001 offers the  
RESET  
function, but it is not available on A290011. The 128 Kbytes of  
data are further divided into seven sectors for flexible sector  
erase capability. The 8 bits of data appear on I/O0 - I/O7 while  
the addresses are input on A0 to A16. The A29001 is offered in  
32-pin PLCC, TSOP, and PDIP packages. This device is  
designed to be programmed in-system with the standard  
system 5.0 volt VCC supply. Additional 12.0 volt VPP is not  
required for in-system write or erase operations. However, the  
A29001 can also be programmed in standard EPROM  
programmers.  
The A29001 has the first toggle bit, I/O6, which indicates  
whether an Embedded Program or Erase is in progress, or it is  
in the Erase Suspend. Besides the I/O6 toggle bit, the A29001  
has a second toggle bit, I/O2, to indicate whether the  
addressed sector is being selected for erase. The A29001 also  
offers the ability to program in the Erase Suspend mode. The  
standard A29001 offers access times of 55, 70 and 90 ns  
allowing high-speed microprocessors to operate without wait  
states. To eliminate bus contention the device has separate  
algorithm  
-
an internal algorithm that automatically  
preprograms the array (if it is not already programmed) before  
executing the erase operation. During erase, the device  
automatically times the erase pulse widths and verifies proper  
erase margin.  
chip enable (  
controls.  
), write enable (  
) and output enable (  
)
OE  
CE  
WE  
PRELIMINARY  
(August, 2001, Version 0.3)  
1
AMIC Technology, Inc.  

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