Datasheet > AS4C256K16FO-50JC

AS4C256K16FO-50JC

更新时间： 2022-10-11 11:57:57

品牌	Logo	应用领域
ALSC		动态存储器
页数	文件大小	规格书
25页	518K
描述
5V 256K X 16 CMOS DRAM (Fast Page Mode)

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AS4C256K16FO

5V 256K X 16 CMOS DRAM (Fast Page Mode)

Features

• Organization: 262,144 words × 16 bits

• Refresh

• High speed

- 512 refresh cycles, 8 ms refresh interval

- RAS-only or CAS-before-RAS refresh or self-refresh

- Self-refresh option is available for new generation

device only. Contact Alliance for more information.

• Read-modify-write

- 25/30/35/50 ns RAS access time

- 12/16/18/25 ns column address access time

- 7/10/10/10 ns CAS access time

• Low power consumption

- Active: 770 mW max (ASAS4C256K16FO-50)

- Standby: 5.5 mW max, CMOS I/O

• Fast page mode

• TTL-compatible, three-state I/O

• JEDEC standard packages

- 400 mil, 40-pin SOJ

• AS4C256K16FO-50 timings are also valid for

AS4C256K16FO-60.

- 400 mil, 40/44-pin TSOP II

• Single 5V power supply/built-in V generator

• Latch-up current > 200 mA

Pin arrangement

Pin designation

Pin(s)

A0 to A8

RAS

Description

Address inputs

TSOP II

SOJ

GND

I/O15

I/O14

I/O13

I/O12

GND

I/O11

I/O10

I/O9

I/O8

I/O0

I/O15

I/O0

I/O1

I/O2

I/O3

I/O1

I/O2

I/O3

I/O14

I/O13

I/O12

Row address strobe

Input/output

I/O0 to I/O15

I/O4

I/O11

I/O10

I/O9

Output enable

I/O4

I/O5

I/O6

I/O7

I/O5

I/O6

UCAS

Column address strobe, upper byte

Column address strobe, lower byte

Read/write control

Power (+5V ± 10%)

Ground

I/O7

I/O8

LCAS

UCAS

RAS

LCAS

UCAS

RAS

V_CC

GND

Selection guide

Symbol

t_RAC

–25

–30

–35

–50

Unit

Maximum RAS access time

Maximum column address

access time

t_CAA

t_CAC

t_OEA

Maximum CAS access time

Maximum output enable (OE)

access time

Minimum read or write cycle

time

t_RC

Minimum EDO page mode

cycle time

t_PC

200

2.0

180

2.0

160

2.0

140

2.0

Maximum operating current

I_CC1

I_CC2

Maximum CMOS standby

current

4/11/01; V.0.9.1

Alliance Semiconductor

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