AS4C256K16E0
®
5V 256K×16 CMOS DRAM (EDO)
Features
• Refresh
• Organization: 262,144 words × 16 bits
- 512 refresh cycles, 8 ms refresh interval
• High speed
- RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device
only. Contact Alliance for more information.
• Read-modify-write
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
• Low power consumption
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 400 mil, 40-pin SOJ
- Active: 500 mW max (AS4C256K16E0-25)
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
• EDO page mode
- 400 mil, 40/44-pin TSOP II
• 5V power supply
• Latch-up current > 200 mA
Pin arrangement
Pin designation
Pin(s)
A0 to A8
RAS
Description
TSOP II
44
SOJ
VCC
I/O0
I/O1
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
1
2
3
4
5
6
7
8
9
10
Vcc
I/O0
I/O1
I/O2
I/O3
Vcc
I/O4
I/O5
I/O6
I/O7
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
Address inputs
Row address strobe
43
42
41
40
39
38
37
36
35
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
I/O0 to I/O15 Input/output
OE
Output enable
UCAS
LCAS
WE
Column address strobe, upper byte
Column address strobe, lower byte
Read/write control
NC
NC
NC
WE
RAS
NC
A0
A1
A2
A3
VCC
NC
13
14
15
16
17
18
19
20
21
22
32
31
30
29
28
27
26
25
24
23
WE
RAS
NC
A0
A1
A2
A3
Vcc
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
VCC
GND
Power (5V ± 0.5V)
A6
A5
A4
GND
Ground
Selection guide
Symbol
AS4C256K16E0-30
AS4C256K16E0-35
AS4C256K16E0-50
Unit
ns
tRAC
tCAA
tCAC
tOEA
tRC
30
16
35
18
50
25
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
ns
10
10
10
ns
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum EDO page mode cycle time
Maximum operating current
10
10
10
ns
65
70
85
ns
tPC
12
14
25
ns
ICC1
ICC2
180
2.0
160
2.0
140
2.0
mA
mA
Maximum CMOS standby current
Shaded areas contain advance information.
4/11/01; v.1.1
Alliance Semiconductor
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