High Performance
1M×4
AS4C14400
AS4C14405
®
CMOS DRAM
1M-bit × 4 CMOS DRAM (Fast page mode or EDO)
Preliminary information
Features
• 1024 refresh cycles, 16 ms refresh interval
• Organization: 1,048,576 words × 4 bits
- RAS-only or CAS-before-RAS refresh
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 300 mil, 20/26-pin SOJ
• High speed
- 40/50/60/70 ns RAS access time
- 20/25/30/35 ns column address access time
- 10/13/15/18 ns CAS access time
• Low power consumption
- Active: 385 mW max (-60)
- Standby: 5.5 mW max, CMOS I/O
• Fast page mode (AS4C14400) or EDO (AS4C14405)
- 300 mil, 20/26-pin TSOP
• Single 5V power supply
• ESD protection ≥ 2001V
• Latch-up current ≥ 200 mA
Pin arrangement
Pin designation
Pin(s)
Description
SOJ
TSOP
A0 to A9
RAS
Address inputs
Row address strobe
Input/output
I/O0
I/O1
WE
RAS
A9
1
2
3
4
5
26
25
24
23
22
GND
I/O3
I/O2
CAS
OE
I/O0
I/O1
WE
RAS
A9
1
2
3
4
5
26
25
24
23
22
GND
I/O3
I/O2
CAS
OE
I/O0 to I/O3
OE
Output enable
Column address strobe
Read/write control
Power (5.0 ± 0.5V)
Ground
9
10
11
12
13
9
10
11
12
18
17
16
15
14
A8
A7
A6
A5
A4
A0
A1
A2
A3
VCC
A0
A1
A2
A3
VCC
18
A8
A7
A6
A5
A4
CAS
17
16
15
14
WE
13
V
CC
GND
Selection guide
Symbol
4C14400-40 4C14400-50 4C14400-60 4C14400-70
Unit
ns
Maximum RAS access time
t
t
t
t
t
t
I
I
40
20
10
10
70
30
90
1.0
50
25
13
13
90
35
80
1.0
60
30
70
35
RAC
CAA
CAC
OEA
RC
Maximum column address access time
Maximum CAS access time
ns
15
18
ns
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
15
18
ns
110
40
130
45
ns
ns
PC
70
60
mA
mA
CC1
CC5
Maximum CMOS standby current
Shaded areas contain advance information.
1.0
1.0
ALLIANCE SEMICONDUCTOR