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A6B273KLW PDF预览

A6B273KLW

更新时间: 2024-02-20 07:25:27
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
12页 131K
描述
8-BIT LATCHED DMOS POWER DRIVER

A6B273KLW 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
接口集成电路类型:LATCH BASED PERIPHERAL DRIVERJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
功能数量:8端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出电流流向:SINK标称输出峰值电流:0.5 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:NMOS温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

A6B273KLW 数据手册

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6B273  
ADVANCE INFORMATION  
8-BIT LATCHED  
DMOS POWER DRIVER  
(Subject to change without notice)  
January 24, 2000  
The A6B273KA and A6B273KLW combine eight (positive-edge-  
triggered D-type) data latches and DMOS outputs for systems requiring  
relatively high load power. Driver applications include relays, sole-  
noids, and other medium-current or high-voltage peripheral power  
loads. The CMOS inputs and latches allow direct interfacing with  
microprocessor-based systems. Use with TTL may require appropriate  
pull-up resistors to ensure an input logic high.  
LOGIC  
SUPPLY  
20  
1
2
3
4
CLEAR  
V
DD  
19  
18  
17  
16  
15  
14  
13  
12  
11  
IN  
8
IN  
IN  
1
IN  
7
2
OUT  
OUT  
OUT  
OUT  
OUT  
1
8
OUT  
OUT  
OUT  
IN  
5
6
7
6
5
2
The DMOS output inverts the DATA input. All of the output  
drivers are disabled (the DMOS sink drivers turned OFF) with the  
CLEAR input low. The A6B273KA/KLW DMOS open-drain outputs  
are capable of sinking up to 500 mA. Similar devices with reduced  
3
4
3
4
7
8
IN  
6
r
DS(on) are available as the A6273KA/KLW.  
9
IN  
IN  
5
The A6B273KA is furnished in a 20-pin dual in-line plastic  
10  
GROUND  
STROBE  
package. The A6B273KLW is furnished in a 20-lead wide-body,  
small-outline plastic package (SOIC) with gull-wing leads for surface-  
mount applications. Copper lead frames, reduced supply current  
requirements, and low on-state resistance allow both devices to sink  
150 mA from all outputs continuously, to ambient temperatures over  
85°C.  
Dwg. PP-015-2  
Note that the A6B273KA (DIP) and the A6B273KLW  
(SOIC) are electrically identical and share a common  
terminal number assignment.  
ABSOLUTE MAXIMUM RATINGS  
at TA = 25°C  
FEATURES  
Output Voltage, VO ............................... 50 V  
Output Drain Current,  
Continuous, IO .......................... 150 mA*  
Peak, IOM ................................... 500 mA†  
Single-Pulse Avalanche Energy,  
EAS ................................................. 30 mJ  
Logic Supply Voltage, VDD .................. 7.0 V  
Input Voltage Range,  
50 V Minimum Output Clamp Voltage  
150 mA Output Current (all outputs simultaneously)  
5 Typical rDS(on)  
Low Power Consumption  
Replacements for TPIC6B273N and TPIC6B273DW  
VI ................................... -0.3 V to +7.0 V  
Package Power Dissipation,  
PD ........................................... See Graph  
Operating Temperature Range,  
TA ................................. -40°C to +125°C  
Storage Temperature Range,  
TS ................................. -55°C to +150°C  
* Each output, all outputs on.  
Always order by complete part number:  
† Pulse duration 100 µs, duty cycle 2%.  
Part Number  
A6B273KA  
A6B273KLW  
Package  
20-pin DIP  
20-lead SOIC  
RθJA  
55°C/W  
70°C/W  
RθJC  
25°C/W  
17°C/W  
Caution: These CMOS devices have input static  
protection (Class 3) but are still susceptible to damage if  
exposed to extremely high static electrical charges.  

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