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A6279EETTR-T PDF预览

A6279EETTR-T

更新时间: 2024-02-24 17:41:13
品牌 Logo 应用领域
急速微 - ALLEGRO 显示驱动器驱动程序和接口接口集成电路信息通信管理PC
页数 文件大小 规格书
18页 652K
描述
Serial-Input Constant-Current Latched LED Drivers with Open LED Detection

A6279EETTR-T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
数据输入模式:SERIAL显示模式:DOT MATRIX
接口集成电路类型:LED DISPLAY DRIVERJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.4 mm
湿度敏感等级:3复用显示功能:NO
功能数量:1区段数:16
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Display Drivers最大供电电压:5.5 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.5 mmBase Number Matches:1

A6279EETTR-T 数据手册

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A6278 and A6279  
Serial-Input Constant-Current Latched  
LED Drivers with Open LED Detection  
Features and Benefits  
3.0 to 5.5 V logic supply range  
Description  
The A6278 and A6279 devices are specifically designed for  
Schmitt trigger inputs for improved noise immunity  
Power-On Reset (POR)  
Up to 90 mA constant-current sinking outputs  
LED open circuit detection  
LED display applications. Each of these BiCMOS devices  
includes a CMOS shift register, accompanying data latches,  
and NPN constant-current sink drivers. The A6278 contains  
8 sink drivers, while there are 16 in the A6279.  
Low-power CMOS logic and latches  
High data input rate  
20 ns typical staggering delay on the outputs  
Internal UVLO and thermal shutdown (TSD) circuitry  
The CMOS shift register and latches allow direct interfacing  
with microprocessor-based systems. With a 3.3 or 5 V logic  
supply, typical serial data-input rates can reach up to 25 MHz.  
The LED drive current is determined by the user’s selection of  
a single resistor.ACMOS serial data output permits cascading  
between multiple devices in applications requiring additional  
drivelines.OpenLEDconnectionscanbedetectedandsignaled  
back to the host microprocessor through the SERIAL DATA  
OUT pin.  
Packages:  
Fourpackagestylesareprovided:anMLP/QFNsurfacemount,  
0.90 mm overall height nominal (A6279 only); a DIP(type A)  
forthrough-holeapplications;andforleadedsurface-mount,an  
SOIC (type LW) and a TSSOPwith exposed thermal pad (type  
LP).All package styles for theA6278 are electrically identical  
to each other, as are the A6279 package styles. All packages  
are lead (Pb) free, with 100% matte tin plated leadframes.  
28 pin MLP/QFN (suffix ET)  
16 and 24 pin DIP (suffix A)  
16 and 24 pin TSSOP (suffix LP)  
16 and 24 pin SOIC (suffix LW)  
Not to scale  
Functional Block Diagram  
LOGIC  
SUPPLY  
UVLO  
SERIAL  
DATA IN  
VDD  
CLOCK  
VDD  
SERIAL  
DATA OUT  
Serial - Parallel Shift Register  
Latches  
OUTPUT  
ENABLE  
Control Logic  
Block  
LATCH  
ENABLE  
Output Control Drivers and Open Circuit Detector  
REXT  
IO  
GND  
Regulator  
Exposed Pad  
(ET and LP packages)  
OUT7 (A6278)  
OUT15 (A6279)  
OUT0 OUT1  
VLED  
6278-DS, Rev. 4  

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