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A6273KA PDF预览

A6273KA

更新时间: 2024-02-06 05:02:25
品牌 Logo 应用领域
急速微 - ALLEGRO 外围驱动器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
10页 172K
描述
8-BIT LATCHED DMOS POWER DRIVER

A6273KA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.91接口集成电路类型:LATCH BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm功能数量:8
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出电流流向:SINK
标称输出峰值电流:2 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:NMOS温度等级:AUTOMOTIVE
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

A6273KA 数据手册

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6273  
ADVANCE INFORMATION  
8-BIT LATCHED  
DMOS POWER DRIVER  
(Subject to change without notice)  
January 24, 2000  
The A6273KA and A6273KLW combine eight (positive-edge-  
triggered D-type) data latches and DMOS outputs for systems requiring  
relatively high load power. Driver applications include relays, sole-  
noids, and other medium-current or high-voltage peripheral power loads.  
The CMOS inputs and latches allow direct interfacing with microproces-  
sor-based systems. Use with TTL may require appropriate pull-up  
resistors to ensure an input logic high.  
LOGIC  
SUPPLY  
20  
19  
18  
17  
16  
15  
14  
13  
1
2
3
4
CLEAR  
V
DD  
IN  
8
IN  
IN  
1
IN  
7
2
OUT  
OUT  
1
8
OUT  
OUT  
OUT  
OUT  
OUT  
IN  
5
6
7
6
5
2
The DMOS output inverts the DATA input. All of the output  
drivers are disabled (the DMOS sink drivers turned OFF) with the  
CLEAR input low. The A6273KA/KLW DMOS open-drain outputs are  
capable of sinking up to 750 mA. Similar devices with reduced rDS(on)  
will be available as the A6A273.  
3
4
3
4
7
8
OUT  
IN  
6
9
12  
11  
IN  
IN  
5
The A6273KA is furnished in a 20-pin dual in-line plastic package.  
The A6273KLW is furnished in a 20-lead wide-body, small-outline  
plastic package (SOIC) with gull-wing leads for surface-mount applica-  
tions. Copper lead frames, reduced supply current requirements, and  
low on-state resistance allow both devices to sink 150 mA from all  
outputs continuously, to ambient temperatures over 85°C.  
10  
GROUND  
STROBE  
Dwg. PP-015-2  
Note that the A6273KA (DIP) and the A6273KLW  
(SOIC) are electrically identical and share a com-  
mon terminal number assignment.  
ABSOLUTE MAXIMUM RATINGS  
at TA = 25°C  
FEATURES  
Output Voltage, VO ............................. 50 V  
Output Drain Current,  
Continuous, IO ....................... 250 mA*  
Peak, IOM .............................. 750 mA*†  
Peak, IOM ..................................... 2.0 A†  
Single-Pulse Avalanche Energy,  
I 50 V Minimum Output Clamp Voltage  
I 250 mA Output Current (all outputs simultaneously)  
I 1.3 Typical rDS(on)  
I Low Power Consumption  
I Replacements for TPIC6273N and TPIC6273DW  
EAS .............................................. 75 mJ  
Logic Supply Voltage, VDD ................ 7.0 V  
Input Voltage Range,  
VI ................................. -0.3 V to +7.0 V  
Package Power Dissipation,  
PD ........................................ See Graph  
Operating Temperature Range,  
TA .............................. -40°C to +125°C  
Storage Temperature Range,  
TS .............................. -55°C to +150°C  
* Each output, all outputs on.  
Always order by complete part number:  
† Pulse duration 100 µs, duty cycle 2%.  
Caution: These CMOS devices have input  
static protection (Class 3) but are still  
susceptible to damage if exposed to extremely  
high static electrical charges.  
Part Number  
A6273KA  
A6273KLW  
Package  
20-pin DIP  
20-lead SOIC  
RθJA  
55°C/W  
70°C/W  
RθJC  
25°C/W  
17°C/W  

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