A3987SLP-T

更新时间： 2024-02-03 15:48:36

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器
页数	文件大小	规格书
13页	450K
描述
DMOS Microstepping Driver with Translator

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数据手册

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A3987SLP-T 数据手册

A3987

DMOS Microstepping Driver with Translator

Features and Benefits

▪ Low R_DS(on)outputs

▪ Short-to-ground protection

▪ Shorted load protection

Description

The A3987 is a complete microstepping motor driver with

built-in translator for easy operation. It is designed to operate

bipolar stepper motors in full, half, quarter, and sixteenth step

▪ Automatic current decay mode detection/selection

▪ Mixed and slow current decay modes

▪ Synchronous rectification for low power dissipation

▪ Internal UVLO and thermal shutdown circuitry

▪ Crossover-current protection

modes, with output drive capability of 50 V and ±1.5 A. The

A3987 includes a fixed off-time current regulator, which has

the ability to operate in slow or mixed decay modes.

The translator is the key to the easy implementation of the

A3987. Simply inputting one pulse on the step input drives the

motortotakeonemicrostep.Therearenophasesequencetables,

highfrequencycontrollines,orcomplexinterfacestoprogram.

The A3987 interface is an ideal fit for applications where a

complex microprocessor is unavailable or over-burdened.

TheA3987 chopping control automatically selects the current

decay mode (slow or mixed). When a STEP signal occurs,

the translator determines if that step results in a higher or

lower current in each of the motor phases. If the change is to

a higher current, then the decay mode is set to slow decay. If

the change is to a lower current, then the decay mode is set to

30.1% fast decay. This current decay control scheme results

in reduced audible motor noise, increased step accuracy, and

reduced power dissipation.

Package: 24 pin TSSOP with exposed

thermal pad (suffix LP)

Approximate scale

Continued on the next page…

Typical Application Diagram

0.1 μF

X7R

0.22 μF

VREG

VDD

CP1

CP2

VCP

0.1 μF

X7R

10 μF

5 kΩ

VBB1

VBB2

ROSC

Microcontroller or

Controller Logic

A3987

100 μF

STEP

DIR

OUT1A

OUT1B

SLEEP/RESET

ENABLE

MS1

SENSE1

OUT2A

MS2

OUT2B

REF

SENSE2

3987DS, Rev.1

12 3 4 5 6 7...13

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