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ADSP-2162BP-40 PDF预览

ADSP-2162BP-40

更新时间: 2024-01-14 18:16:37
品牌 Logo 应用领域
亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器装置计算机时钟
页数 文件大小 规格书
39页 245K
描述
DSP Microcomputers with ROM

ADSP-2162BP-40 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:LCC-68
针数:68Reach Compliance Code:not_compliant
风险等级:5.92Is Samacsys:N
其他特性:20 MIPS; SINGLE CYCLE INSTRUCTION EXECUTION地址总线宽度:14
桶式移位器:YES位大小:16
边界扫描:NO最大时钟频率:10.24 MHz
外部数据总线宽度:24格式:FIXED POINT
集成缓存:NO内部总线架构:MULTIPLE
JESD-30 代码:S-PQCC-J68JESD-609代码:e0
长度:24.18 mm低功率模式:YES
DMA 通道数量:外部中断装置数量:1
串行 I/O 数:2端子数量:68
计时器数量:1片上数据RAM宽度:16
片上程序ROM宽度:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC68,1.0SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not QualifiedRAM(字数):512
ROM可编程性:MROM座面最大高度:4.45 mm
子类别:Digital Signal Processors最大压摆率:20 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:24.18 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

ADSP-2162BP-40 数据手册

 浏览型号ADSP-2162BP-40的Datasheet PDF文件第2页浏览型号ADSP-2162BP-40的Datasheet PDF文件第3页浏览型号ADSP-2162BP-40的Datasheet PDF文件第4页浏览型号ADSP-2162BP-40的Datasheet PDF文件第5页浏览型号ADSP-2162BP-40的Datasheet PDF文件第6页浏览型号ADSP-2162BP-40的Datasheet PDF文件第7页 
a
DSP Microcomputers with ROM  
ADSP-216x  
FUNCTIONAL BLOCK DIAGRAM  
SUMMARY  
16-Bit Fixed-Point DSP Microprocessors with  
On-Chip Memory  
Enhanced Harvard Architecture for Three-Bus  
Performance: Instruction Bus and Dual Data Buses  
Independent Computation Units: ALU, Multiplier/  
Accumulator and Shifter  
Single-Cycle Instruction Execution and Multifunction  
Instructions  
On-Chip Program Memory ROM and Data Memory RAM  
Integrated I/O Peripherals: Serial Ports, Timer  
MEMORY  
DATA ADDRESS  
PROGRAM  
SEQUENCER  
GENERATORS  
DATA  
MEMORY  
PROGRAM  
MEMORY  
DAG 2  
DAG 1  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
EXTERNAL  
DATA  
BUS  
FEATURES  
ARITHMETIC UNITS  
SERIAL PORTS  
SPORT 0 SPORT 1  
TIMER  
25 MIPS, 40 ns Maximum Instruction Rate (5 V)  
Separate On-Chip Buses for Program and Data Memory  
Program Memory Stores Both Instructions and Data  
(Three-Bus Performance)  
ALU MAC SHIFTER  
ADSP-2100 CORE  
Dual Data Address Generators with Modulo and  
Bit-Reverse Addressing  
Efficient Program Sequencing with Zero-Overhead  
Looping: Single-Cycle Loop Setup  
Double-Buffered Serial Ports with Companding Hardware,  
Automatic Data Buffering and Multichannel Operation  
Three Edge- or Level-Sensitive Interrupts  
Low Power IDLE Instruction  
Fabricated in a high speed, submicron, double-layer metal  
CMOS process, the highest-performance ADSP-216x proces-  
sors operate at 25 MHz with a 40 ns instruction cycle time.  
Every instruction can execute in a single cycle. Fabrication in  
CMOS results in low power dissipation.  
PLCC and MQFP Packages  
The ADSP-2100 Family’s flexible architecture and compre-  
hensive instruction set support a high degree of parallelism.  
In one cycle the ADSP-216x can perform all of the following  
operations:  
GENERAL DESCRIPTION  
The ADSP-216x Family processors are single-chip micro-  
computers optimized for digital signal processing (DSP)  
and other high speed numeric processing applications. The  
ADSP-216x processors are all built upon a common core with  
ADSP-2100. Each processor combines the core DSP architec-  
ture—computation units, data address generators and program  
sequencer—with features such as on-chip program ROM and  
data memory RAM, a programmable timer and two serial ports.  
The ADSP-2165/ADSP-2166 also adds program memory and  
power-down mode.  
Generate the next program address  
Fetch the next instruction  
Perform one or two data moves  
Update one or two data address pointers  
Perform a computation  
Receive and transmit data via one or two serial ports  
Table I shows the features of each ADSP-216x processor.  
The ADSP-216x series are memory-variant versions of the  
ADSP-2101 and ADSP-2103 that contain factory-programmed  
on-chip ROM program memory. These devices offer different  
amounts of on-chip memory for program and data storage.  
Table I shows the features available in the ADSP-216x series of  
custom ROM-coded processors.  
This data sheet describes the following ADSP-216x Family  
processors:  
ADSP-2161/ADSP-2162/  
ADSP-2163/ADSP-2164  
ADSP-2165/ADSP-2166  
Custom ROM-programmed DSPs:  
ROM-programmed ADSP-216x  
processors with power-down and  
larger on-chip memories (12K Pro-  
gram Memory ROM, 1K Program  
Memory RAM, 4K Data Memory  
RAM)  
The ADSP-216x products eliminate the need for an external  
boot EPROM in your system, and can also eliminate the need  
for any external program memory by fitting the entire applica-  
tion program in on-chip ROM. These devices thus provide an  
excellent option for volume applications where board space and  
system cost constraints are of critical concern.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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