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ADSP-21362BSWZ-1AA PDF预览

ADSP-21362BSWZ-1AA

更新时间: 2024-02-25 20:51:40
品牌 Logo 应用领域
亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器时钟
页数 文件大小 规格书
56页 1448K
描述
SHARC Processors

ADSP-21362BSWZ-1AA 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:ROHS COMPLIANT, MO-026BFB-HD, LQFP-144针数:144
Reach Compliance Code:unknownECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.79
Is Samacsys:N其他特性:ALSO REQUIRES 3.3V SUPPLY
地址总线宽度:16桶式移位器:YES
位大小:32边界扫描:YES
最大时钟频率:55.55 MHz外部数据总线宽度:16
格式:FLOATING POINT内部总线架构:MULTIPLE
JESD-30 代码:S-PQFP-G144JESD-609代码:e3
长度:20 mm低功率模式:NO
湿度敏感等级:3端子数量:144
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP144,.87SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.2,3.3 V认证状态:Not Qualified
RAM(字数):98304座面最大高度:1.6 mm
子类别:Digital Signal Processors最大供电电压:1.26 V
最小供电电压:1.14 V标称供电电压:1.2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:20 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

ADSP-21362BSWZ-1AA 数据手册

 浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第2页浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第3页浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第4页浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第5页浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第6页浏览型号ADSP-21362BSWZ-1AA的Datasheet PDF文件第7页 
SHARC Processors  
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366  
SUMMARY  
DEDICATED AUDIO COMPONENTS  
High performance 32-bit/40-bit floating point processor  
optimized for high performance audio processing  
Single-instruction, multiple-data (SIMD) computational  
architecture  
S/PDIF-compatible digital audio receiver/transmitter  
8 channels of asynchronous sample rate converters (SRC)  
16 PWM outputs configured as four groups of four outputs  
ROM-based security features include:  
JTAG access to memory permitted with a 64-bit key  
Protected memory regions that can be assigned to limit  
access under program control to sensitive code  
PLL has a wide variety of software and hardware multi-  
plier/divider ratios  
On-chip memory—3M bits of on-chip SRAM  
Code compatible with all other members of the SHARC family  
The ADSP-2136x processors are available with up to 333 MHz  
core instruction rate with unique audiocentric peripherals  
such as the digital applications interface, S/PDIF trans-  
ceiver, DTCP (digital transmission content protection  
protocol), serial ports, precision clock generators, and  
more. For complete ordering information, see Ordering  
Guide on Page 54.  
Available in 136-ball CSP_BGA and 144-lead LQFP_EP  
packages  
Internal Memory  
SIMD Core  
Block 0  
RAM/ROM  
Block 1  
RAM/ROM  
Block 2  
RAM  
Block 3  
RAM  
Instruction  
Cache  
5 stage  
Sequencer  
B2D  
64-BIT  
B0D  
64-BIT  
B3D  
64-BIT  
B1D  
64-BIT  
S
DAG1/2  
PEx  
Timer  
PEy  
DMD 64-BIT  
PMD 64-BIT  
DMD 64-BIT  
PMD 64-BIT  
Core Bus  
Cross Bar  
Internal Memory I/F  
FLAGx/IRQx/  
TMREXP  
JTAG  
PERIPHERAL BUS  
32-BIT  
IOD 32-BIT  
MTM/  
DTCP  
IOD BUS  
PERIPHERAL BUS  
CORE TIMER ASRC S/PDIF PCG  
FLAGS Tx/Rx  
Core  
Flags  
PDAP/ SPORT  
IDP7-0  
PWM  
3-0  
SPI B  
PP  
SPI  
2
-
0
3-0  
A-B  
5
-
0
DAI Routing/Pins  
PP Pin MUX  
DAI Peripherals  
Peripherals  
Figure 1. Functional Block Diagram  
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.  
Rev. G  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2011 All rights reserved.  

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