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ADSP-2103KP-40

更新时间： 2024-01-13 20:24:03
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亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器装置计算机时钟
页数 文件大小 规格书
64页 666K
描述
ADSP-2100 Family DSP Microcomputers

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ADSP-2103KP-40 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：LCC
包装说明：QCCJ,针数：68
Reach Compliance Code：unknown风险等级：5.78
其他特性：20 MIPS; SINGLE CYCLE INSTRUCTION EXECUTION地址总线宽度：14
桶式移位器：YES边界扫描：NO
最大时钟频率：10.24 MHz外部数据总线宽度：24
格式：FIXED POINT内部总线架构：MULTIPLE
JESD-30 代码：S-PQCC-J68JESD-609代码：e0
长度：24.18 mm低功率模式：YES
湿度敏感等级：NOT SPECIFIED端子数量：68
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：COMMERCIAL
座面最大高度：4.45 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：24.18 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

ADSP-2103KP-40 数据手册

 浏览型号ADSP-2103KP-40的Datasheet PDF文件第2页浏览型号ADSP-2103KP-40的Datasheet PDF文件第3页浏览型号ADSP-2103KP-40的Datasheet PDF文件第4页浏览型号ADSP-2103KP-40的Datasheet PDF文件第5页浏览型号ADSP-2103KP-40的Datasheet PDF文件第6页浏览型号ADSP-2103KP-40的Datasheet PDF文件第7页 
ADSP-2100 Family  
DSP Microcomputers  
a
ADSP-21xx  
FUNCTIO NAL BLO CK D IAGRAM  
SUMMARY  
16-Bit Fixed-Point DSP Microprocessors w ith  
On-Chip Mem ory  
Enhanced Harvard Architecture for Three-Bus  
Perform ance: Instruction Bus & Dual Data Buses  
Independent Com putation Units: ALU, Multiplier/  
Accum ulator, and Shifter  
Single-Cycle Instruction Execution & Multifunction  
Instructions  
On-Chip Program Mem ory RAM or ROM  
& Data Mem ory RAM  
MEMORY  
FLAGS  
DATA ADDRESS  
GENERATORS  
(ADSP-2111)  
PROGRAM  
SEQUENCER  
DATA  
MEMORY  
PROGRAM  
MEMORY  
DAG 1  
DAG 2  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
EXTERNAL  
DATA  
BUS  
Integrated I/ O Peripherals: Serial Ports, Tim er,  
Host Interface Port (ADSP-2111 Only)  
HOST  
INTERFACE  
PORT  
SERIAL PORTS  
SPORT 0 SPORT 1  
ARITHMETIC UNITS  
MAC  
TIMER  
SHIFTER  
ALU  
FEATURES  
(ADSP-2111)  
25 MIPS, 40 ns Maxim um Instruction Rate  
Separate On-Chip Buses for Program and Data Mem ory  
Program Mem ory Stores Both Instructions and Data  
(Three-Bus Perform ance)  
Dual Data Address Generators w ith Modulo and  
Bit-Reverse Addressing  
ADSP-2100 CORE  
T his data sheet describes the following ADSP-2100 Family  
processors:  
ADSP-2101  
Efficient Program Sequencing w ith Zero-Overhead  
Looping: Single-Cycle Loop Setup  
ADSP-2103  
ADSP-2105  
ADSP-2111  
ADSP-2115  
3.3 V Version of ADSP-2101  
Low Cost DSP  
DSP with Host Interface Port  
Autom atic Booting of On-Chip Program Mem ory from  
Byte-Wide External Mem ory (e.g., EPROM )  
Double-Buffered Serial Ports w ith Com panding Hardw are,  
Autom atic Data Buffering, and Multichannel Operation  
ADSP-2111 Host Interface Port Provides Easy Interface  
to 68000, 80C51, ADSP-21xx, Etc.  
ADSP-2161/62/63/64 Custom ROM-programmed DSPs  
T he following ADSP-2100 Family processors are not included  
in this data sheet:  
Autom atic Booting of ADSP-2111 Program Mem ory  
Through Host Interface Port  
Three Edge- or Level-Sensitive Interrupts  
Low Pow er IDLE Instruction  
PGA, PLCC, PQFP, and TQFP Packages  
MIL-STD-883B Versions Available  
ADSP-2100A  
DSP Microprocessor  
ADSP-2165/66  
ROM-programmed ADSP-216x processors  
with powerdown and larger on-chip  
memories (12K Program Memory ROM,  
1K Program Memory RAM, 4K Data  
Memory RAM)  
ADSP-21msp5x  
ADSP-2171  
Mixed-Signal DSP Processors with  
integrated on-chip A/D and D/A plus  
powerdown  
GENERAL D ESCRIP TIO N  
T he ADSP-2100 Family processors are single-chip micro-  
computers optimized for digital signal processing (DSP)  
and other high speed numeric processing applications. T he  
ADSP-21xx processors are all built upon a common core. Each  
processor combines the core DSP architecture—computation  
units, data address generators, and program sequencer—with  
differentiating features such as on-chip program and data  
memory RAM, a programmable timer, one or two serial ports,  
and, on the ADSP-2111, a host interface port.  
Speed and feature enhanced ADSP-2100  
Family processor with host interface port,  
powerdown, and instruction set extensions  
for bit manipulation, multiplication, biased  
rounding, and global interrupt masking  
ADSP-2181  
ADSP-21xx processor with ADSP-2171  
features plus 80K bytes of on-chip RAM  
configured as 16K words of program  
memory and 16K words of data memory.  
Refer to the individual data sheet of each of these processors for  
further information.  
REV. B  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
© Analog Devices, Inc., 1996  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700  
Fax: 617/ 326-8703  
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