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ADF4116BCP PDF预览

ADF4116BCP

更新时间: 2024-02-21 03:27:36
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亚德诺 - ADI 射频
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20页 227K
描述
RF PLL Frequency Synthesizers

ADF4116BCP 数据手册

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a
RF PLL Frequency Synthesizers  
ADF4116/ADF4117/ADF4118  
GENERAL DESCRIPTION  
FEATURES  
The ADF4116 family of frequency synthesizers can be used  
to implement local oscillators in the up-conversion and down-  
conversion sections of wireless receivers and transmitters. They  
consist of a low-noise digital PFD (Phase Frequency Detector),  
a precision charge pump, a programmable reference divider,  
programmable A and B counters and a dual-modulus prescaler  
(P/P+1). The A (5-bit) and B (13-bit) counters, in conjunction  
with the dual modulus prescaler (P/P+1), implement an N  
divider (N = BP+A). In addition, the 14-bit reference counter  
(R Counter), allows selectable REFIN frequencies at the PFD  
input. A complete PLL (Phase-Locked Loop) can be imple-  
mented if the synthesizer is used with an external loop filter and  
VCO (Voltage Controlled Oscillator).  
ADF4116: 550 MHz  
ADF4117: 1.2 GHz  
ADF4118: 3.0 GHz  
2.7 V to 5.5 V Power Supply  
Separate VP Allows Extended Tuning Voltage in 3 V  
Systems  
Selected Charge Pump Currents  
Dual Modulus Prescaler  
ADF4116: 8/9  
ADF4117/ADF4118: 32/33  
3-Wire Serial Interface  
Digital Lock Detect  
Power-Down Mode  
Fast Lock Mode  
Control of all the on-chip registers is via a simple 3-wire interface.  
The devices operate with a power supply ranging from 2.7 V to  
5.5 V and can be powered down when not in use.  
APPLICATIONS  
Base Stations for Wireless Radio (GSM, PCS, DCS,  
CDMA, WCDMA)  
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)  
Wireless LANS  
Communications Test Equipment  
CATV Equipment  
FUNCTIONAL BLOCK DIAGRAM  
AV  
DD  
DV  
DD  
V
P
CPGND  
REFERENCE  
ADF4116/ADF4117/ADF4118  
14-BIT  
R COUNTER  
REF  
IN  
PHASE  
FREQUENCY  
DETECTOR  
CHARGE  
PUMP  
CP  
14  
R COUNTER  
LATCH  
CLK  
DATA  
LE  
21-BIT  
INPUT REGISTER  
FUNCTION  
LATCH  
LOCK  
DETECT  
19  
A, B COUNTER  
LATCH  
SD  
OUT  
18  
HIGH Z  
FROM  
FUNCTION LATCH  
AV  
DD  
13  
MUX  
MUXOUT  
N = BP + A  
13-BIT  
B COUNTER  
SD  
OUT  
RF  
RF  
A
B
IN  
LOAD  
LOAD  
PRESCALER  
P/P +1  
IN  
5-BIT  
A COUNTER  
M3 M2 M1  
FL  
SWITCH  
O
FL  
O
5
CE  
AGND  
DGND  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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