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ADCMP605BCPZ-WP

更新时间： 2024-02-11 17:56:05
品牌 Logo 应用领域
亚德诺 - ADI 比较器放大器放大器电路
页数 文件大小 规格书
16页 390K
描述
Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply LVDS Comparators

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ADCMP605BCPZ-WP 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC12,.12SQ,20针数：12
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.78
放大器类型：COMPARATOR最大平均偏置电流 (IIB)：5 µA
25C 时的最大偏置电流 (IIB)：5 µA最大输入失调电压：5000 µV
JESD-30 代码：S-XQCC-N12JESD-609代码：e3
长度：3 mm湿度敏感等级：3
功能数量：1端子数量：12
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC12,.12SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：3/5 V认证状态：Not Qualified
标称响应时间：3 ns座面最大高度：1 mm
子类别：Comparator最大压摆率：3 mA
供电电压上限：6 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：3 mm
Base Number Matches：1

ADCMP605BCPZ-WP 数据手册

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Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,  
Single-Supply LVDS Comparators  
ADCMP604/ADCMP605  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
V
CCO  
Fully specified rail to rail at VCCI = 2.5 V to 5.5 V  
Input common-mode voltage from −0.2 V to VCCI + 0.2 V  
Low glitch LVDS-compatible output stage  
1.6 ns propagation delay  
37 mW at 2.5 V  
Shutdown pin  
V
CCI  
(ADCMP605 ONLY)  
V
NONINVERTING  
INPUT  
P
Q OUTPUT  
Q OUTPUT  
ADCMP604/  
ADCMP605  
LVDS  
Single-pin control for programmable hysteresis and latch  
Power supply rejection > 60 dB  
V
INVERTING  
INPUT  
N
−40°C to +125°C operation  
LE/HYS INPUT  
(ADCMP605  
ONLY)  
S
INPUT  
DN  
APPLICATIONS  
Figure 1.  
High speed instrumentation  
Clock and data signal restoration  
Logic level shifting or translation  
Pulse spectroscopy  
High speed line receivers  
Threshold detection  
Peak and zero-crossing detectors  
High speed trigger circuitry  
Pulse-width modulators  
Current-/voltage-controlled oscillators  
Automatic test equipment (ATE)  
GENERAL DESCRIPTION  
A flexible power supply scheme allows the devices to operate  
with a single 2.5 V positive supply and a −0.5 V to +2.7 V input  
signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V  
input signal range. Split input/output supplies, with no sequencing  
restrictions on the ADCMP605, support a wide input signal  
range with greatly reduced power consumption.  
The ADCMP604/ADCMP605 are very fast comparators  
fabricated on the Analog Devices, Inc. proprietary XFCB2  
process. These comparators are exceptionally versatile and easy  
to use. Features include an input range from VEE − 0.5 V to VCCI  
0.2 V, low noise, LVDS-compatible output drivers, and  
+
TTL/CMOS latch inputs with adjustable hysteresis and/or shut-  
down inputs.  
The LVDS-compatible output stage is designed to drive any  
standard LVDS input. The comparator input stage offers robust  
protection against large input overdrive, and the outputs do not  
phase reverse when the valid input signal range is exceeded. High  
speed latch and programmable hysteresis features are also provided  
in a unique single-pin control option.  
The devices offer 1.5 ns propagation delays with 1 ps rms  
random jitter (RJ). Overdrive and slew rate dispersion are  
typically less than 50 ps.  
The ADCMP604 is available in a 6-lead SC70 package, and the  
ADCMP605 is available in a 12-lead LFCSP.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2006–2007 Analog Devices, Inc. All rights reserved.  
 
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