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ADAU1373BCBZ-R7

更新时间: 2024-01-10 20:07:22
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器电信集成电路电信电路放大器PC
页数 文件大小 规格书
296页 8003K
描述
Low Power Codec with Speaker and Headphone Amplifier

ADAU1373BCBZ-R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:VFBGA,针数:81
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
滤波器:YESJESD-30 代码:R-PBGA-B81
JESD-609代码:e3长度:4.045 mm
湿度敏感等级:1功能数量:1
端子数量:81工作模式:SYNCHRONOUS/ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:0.56 mm标称供电电压:1.8 V
表面贴装:YES电信集成电路类型:PCM CODEC
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:BALL端子节距:0.4 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.82 mmBase Number Matches:1

ADAU1373BCBZ-R7 数据手册

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Low Power Codec with Speaker and  
Headphone Amplifier  
ADAU1373  
FEATURES  
Eight single-ended or four differential analog inputs with PGAs  
are provided for adjusting the gain from −12 dB to +18 dB. They  
can be configured for microphones or line level signals.  
1 stereo ADC and 2 stereo DACs with sampling rates  
from 8 kHz to 48 kHz  
Low power: 7 mW record, 6 mW playback, 48 kHz at 1.8 V  
8 single-ended or 4 differential inputs with PGA  
2 microphone bias reference voltages with current sense  
2 stereo digital microphone inputs  
Two stereo digital microphone inputs are supported; four digital  
microphones can be connected in total. In addition, three serial  
digital audio input/output ports are provided with asynchronous  
sample rate converters (ASRCs) to support various sampling rates,  
allowing for flexible system design in mobile phone applications.  
The inputs can be mixed and selected before the ADC or con-  
figured to bypass the ADC. Two stereo DACs are included, with  
a flexible mixing option for routing the signals internally.  
Flexible analog input/output mixers  
1 stereo differential or 2 stereo single-ended line outputs  
True ground-centered stereo Class-G headphone amplifier,  
capable of 2 × 50 mW into 16 Ω at 1.8 V, 10% THD  
Filterless stereo Class-D speaker amplifier, capable of 2 ×  
880 mW into 8 Ω at 3.6 V, 10% THD  
Differential earpiece amplifier capable of driving 32 Ω  
2 PLLs, supporting input clocks from 8 kHz to 27 MHz  
I2C control interface  
The analog output side consists of line outputs, headphone output,  
speaker output, and receiver output. Two stereo single-ended  
line level outputs, which can be configured as two differential  
outputs, are included. The headphone output is stereo true ground  
centered (eliminating the need for coupling capacitors), with  
efficient Class-G (rail switching) architecture. The efficient stereo  
filterless Class-D switching amplifier provides ~1 W of stereo  
power for speakers. The differential receiver amplifier can be  
used to connect the separate receiver speaker. Two PLL blocks,  
which can lock to the inputs from 8 kHz to 27 MHz, are included.  
Digital audio processing  
3 digital audio input and output ports with ASRC  
I2S, PCM, right-justified, left-justified modes  
4.05 mm × 3.82 mm, 81-ball, 0.4 mm pitch WLCSP package  
−40°C to +85°C operating temperature range  
APPLICATIONS  
The DSP allows system designers to compensate for the real-world  
limitations of microphones, speakers, amplifiers, and listening  
environments, resulting in a dramatic improvement in perceived  
audio quality through equalization, multiband compression, and  
limiting algorithms. The SigmaStudio™ graphical development tool,  
which includes audio processing blocks such as filters, mixers,  
dynamics processors, and amplifiers for fast development of  
custom signal flows, is used to program the ADAU1373.  
Mobile phones, tablet PCs, e-books, portable media players  
GENERAL DESCRIPTION  
The ADAU1373 is a low power, stereo audio codec with integrated  
digital audio processing that supports stereo 48 kHz record and  
playback. The stereo audio ADCs and DACs support sampling  
rates from 8 kHz to 48 kHz, as well as a digital volume control.  
FUNCTIONAL BLOCK DIAGRAM  
EARPIECE  
AMP  
SERIAL  
DIGITAL  
AUDIO  
EPP  
EPN  
BCLKA/BCLKB/BCLKC  
LRCLKA/LRCLKB/LRCLKC  
SDATAINA/SDATAINB/SDATAINC  
LINEOUT2  
LINEOUT1  
INTERFACE  
INPUT  
OUTPUT  
MUX  
A
LOUT1L/LOUTLP, LOUT2L/LOUTLN  
LOUT1R/LOUTRP, LOUT2R/LOUTRN  
LN1FBIN, LN2FBIN  
FDSP  
SDATAOUTA/SDATAOUTB/SDATAOUTC  
DIGITAL  
MICROPHONE  
MUX  
MIX  
DMIC1_2_DATA  
DMIC3_4_DATA  
DMIC_CLK  
HEADPHONE  
AMP  
HPL  
SGND  
HPR  
MUX  
DAC1  
ADC  
I2C  
MIX  
SPEAKER  
AMP  
SPKLP  
SPKLN  
SPKRP  
SPKRN  
MICBIAS1, MICBIAS2  
DAC2  
GPIO  
PLLA  
ANALOG  
INPUTS  
AIN1L/AIN1P TO AIN4L/AIN4P  
AIN1R/AIN1N TO AIN4R/AIN4N  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 

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