5秒后页面跳转
AD9862BST PDF预览

AD9862BST

更新时间: 2024-01-24 03:41:30
品牌 Logo 应用领域
亚德诺 - ADI 通信
页数 文件大小 规格书
32页 588K
描述
Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications

AD9862BST 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP,针数:128
Reach Compliance Code:unknown风险等级:5.08
JESD-30 代码:R-PQFP-G128JESD-609代码:e3
长度:20 mm湿度敏感等级:3
功能数量:1端子数量:128
最高工作温度:70 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:TELECOM CIRCUIT
温度等级:OTHER端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:14 mmBase Number Matches:1

AD9862BST 数据手册

 浏览型号AD9862BST的Datasheet PDF文件第2页浏览型号AD9862BST的Datasheet PDF文件第3页浏览型号AD9862BST的Datasheet PDF文件第4页浏览型号AD9862BST的Datasheet PDF文件第5页浏览型号AD9862BST的Datasheet PDF文件第6页浏览型号AD9862BST的Datasheet PDF文件第7页 
Mixed-Signal Front-End (MxFE) Processor  
for Broadband Communications  
a
AD9860/AD9862*  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Mixed-Signal Front-End Processor with Dual Converter  
Receive and Dual Converter Transmit Signal Paths  
Receive Signal Path Includes:  
Two 10-/12-Bit, 64 MSPS Sampling A/D Converters  
with Internal or External Independent References,  
Input Buffers, Programmable Gain Amplifiers,  
Low-Pass Decimation Filters, and a Digital Hilbert Filter  
Transmit Signal Path Includes:  
VIN+A  
VIN–A  
PGA  
PGA  
ADC  
RxA DATA  
[0:11]  
1x  
1x  
BYPASSABLE LOW-PASS  
DECIMATION FILTER  
HILBERT  
FILTER  
VIN+B  
VIN–B  
ADC  
RxB DATA  
[0:11]  
LOGIC LOW  
SIGDELT  
-ꢁ  
AD9860/AD9862  
Two 12-/14-Bit, 128 MSPS D/A Converters with  
Programmable Full-Scale Output Current, Channel  
Independent Fine Gain and Offset Control, Digital  
Hilbert and Interpolation Filters, and Digitally Tunable  
Real or Complex Up-Converters  
Delay-Locked Loop Clock Multiplier and Integrated  
Timing Generation Circuitry Allow for Single Crystal  
or Clock Operation  
Programmable Output Clocks, Serial Programmable  
Interface, Programmable Sigma-Delta, Three Auxiliary  
DAC Outputs and Two Auxiliary ADCs with Dual  
Multiplexed Inputs  
SPI  
SPI REGISTERS  
AUX_DAC_A  
AUX_DAC_B  
AUX_DAC_C  
AUX DAC  
AUX DAC  
AUX DAC  
INTERFACE  
Rx PATH  
TIMING  
CLOCK  
DISTRIBUTION  
BLOCK  
OSC1  
OSC2  
DLL  
1, 2, 4ꢂ  
Tx PATH  
TIMING  
AUX_ADC_A1  
AUX_ADC_A2  
AUX ADC  
AUX_ADC_B1  
AUX_ADC_B2  
CLKOUT1  
CLKOUT2  
AUX ADC  
BYPASSABLE BYPASSABLE  
DIGITAL DIGITAL  
QUADRATURE QUADRATURE  
MIXER MIXER  
IOUT+A  
IOUT–A  
PGA  
PGA  
DAC  
DAC  
Tx DATA  
[0:13]  
HILBERT  
FILTER  
IOUT+B  
IOUT–B  
APPLICATIONS  
Broadband Wireless Systems  
Fixed Wireless, WLAN, MMDS, LMDS  
Broadband Wireline Systems  
Cable Modems, VDSL, PowerPlug  
Digital Communications  
BYPASSABLE  
FS/4  
FS/8  
LOW-PASS  
INTERPOLATION  
FILTER  
NCO  
Set-Top Boxes, Data Modems  
range for both channels. The output data bus can be multi-  
plexed to accommodate a variety of interface types.  
GENERAL DESCRIPTION  
The AD9860/AD9862 transmit path (Tx) consists of two chan-  
nels that contain high performance, 12-/14-bit, 128 MSPS  
digital-to-analog converters (DAC), programmable gain amplifiers  
(TxPGA), interpolation filters, a Hilbert filter, and digital mixers  
for complex or real signal frequency modulation. The Tx latch  
and demultiplexer circuitry can process real or I/Q data. Interpo-  
lation rates of 2and 4are available to ease requirements on  
an external reconstruction filter. For single channel systems, the  
digital Hilbert filter can be used with an external quadrature  
modulator to create an image rejection architecture. The two  
12-/14-bit, high performance DACs produce an output signal  
that can be scaled over a 20 dB range by the TxPGA.  
The AD9860 and AD9862 (AD9860/AD9862) are versatile  
integrated mixed-signal front-ends (MxFE) that are optimized  
for broadband communication markets. The AD9860/AD9862  
are cost effective, mixed signal solutions for wireless or wireline  
standards based or proprietary broadband modem systems where  
dynamic performance, power dissipation, cost, and size are all  
critical attributes. The AD9860 has 10-bit ADCs and 12-bit DACs;  
the AD9862 has 12-bit ADCs and 14-bit DACs.  
The AD9860/AD9862 receive path (Rx) consists of two channels  
that each include a high performance, 10-/12-bit, 64 MSPS analog-  
to-digital converter (ADC), input buffer, Programmable Gain  
Amplifier (RxPGA), digital Hilbert filter, and decimation filter. The  
Rx can be used to receive real, diversity, or I/Q data at baseband or  
low IF. The input buffers provide a constant input impedance for  
both channels to ease impedance matching with external com-  
ponents (e.g., SAW filter). The RxPGA provides a 20 dB gain  
A programmable delay-locked loop (DLL) clock multiplier and  
integrated timing circuits enable the use of a single external  
reference clock or an external crystal to generate clocking for all  
internal blocks and also provides two external clock outputs.  
Additional features include a programmable sigma-delta output,  
four auxiliary ADC inputs and three auxiliary DAC outputs.  
Device programmability is facilitated by a serial port interface  
(SPI) combined with a register bank. The AD9860/AD9862 is  
available in a space saving 128-lead LQFP.  
*Protected by U.S.Patent No. 5,969,657; other patents pending.  
MxFE is a trademark of Analog Devices, Inc.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

与AD9862BST相关器件

型号 品牌 描述 获取价格 数据表
AD9862BSTRL ADI IC SPECIALTY TELECOM CIRCUIT, PQFP128, PLASTIC, LQFP-128, Telecom IC:Other

获取价格

AD9862BSTRL ROCHESTER SPECIALTY TELECOM CIRCUIT, PQFP128, PLASTIC, LQFP-128

获取价格

AD9862BSTZ ADI Mixed-Signal Front-End (MxFE™) Processor fo

获取价格

AD9862BSTZ ROCHESTER SPECIALTY TELECOM CIRCUIT, PQFP128, PLASTIC, LQFP-128

获取价格

AD9862BSTZRL ADI 暂无描述

获取价格

AD9862PCB ADI Mixed-Signal Front-End (MxFE⑩) Processor for

获取价格