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AD8382 PDF预览

AD8382

更新时间: 2024-01-24 22:57:21
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 868K
描述
High Performance 12-Bit, 6-Channel Output, Decimating LCD DecDriver

AD8382 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFN
包装说明:7 X 7 MM, MO-220-VKKD-2, LFCSP-48针数:48
Reach Compliance Code:unknown风险等级:5.77
数据输入模式:PARALLEL接口集成电路类型:LIQUID CRYSTAL DISPLAY DRIVER
JESD-30 代码:S-PQCC-N48JESD-609代码:e0
长度:7 mm湿度敏感等级:NOT SPECIFIED
复用显示功能:NO功能数量:1
区段数:6端子数量:48
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:COMMERCIAL
座面最大高度:1 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
电源电压1-最大:18 V电源电压1-分钟:9 V
电源电压1-Nom:15.5 V表面贴装:YES
温度等级:OTHER端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

AD8382 数据手册

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High Performance 12-Bit, 6-Channel Output,  
Decimating LCD DecDriver®  
AD8382  
PRODUCT FEATURES  
High accuracy, high resolution voltage outputs  
12-bit input resolution  
FUNCTIONAL BLOCK DIAGRAM  
Laser trimmed outputs  
12  
12  
12  
12  
12  
12  
12  
12  
12  
12  
12  
12  
12  
12  
2-STAGE  
LATCH  
Fast settling, high voltage drive  
33 ns settling time to 0.25% into 200 pF load  
Slew rate 390 V/µs  
Outputs to within 1.3 V of supply  
High update rates  
Fast, 120 Ms/s data update rate  
Voltage controlled video reference (brightness) and  
full-scale (contrast) output levels  
Flexible logic  
STSQ/XFR allow parallel AD8382 operation  
INV bit reverses polarity of video signal  
Output overload protection  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
DB(0:11)  
VID0  
VID1  
VID2  
VID3  
VID4  
VID5  
2-STAGE  
LATCH  
AD8382  
2-STAGE  
LATCH  
STBY  
BYP  
BIAS  
2-STAGE  
LATCH  
2-STAGE  
LATCH  
R/L  
E/O  
2-STAGE  
LATCH  
CLK  
STSQ  
XFR  
SEQUENCE  
CONTROL  
Low static power dissipation: 743 mW  
Includes STBY function  
3.3 V logic, 9 V to 18 V analog supplies  
Available in 48-lead 7 mm × 7 mm LFCSP  
SCALING  
CONTROL  
VREFHI  
VREFLO  
INV  
V1 V2  
Figure 1. Functional Block Diagram  
APPLICATIONS  
LCD analog column driver  
PRODUCT DESCRIPTION  
The AD8382 DecDriver provides a fast, 12-bit latched decimat-  
ing digital input that drives six high voltage outputs.12-bit input  
words are sequentially loaded into six separate, high speed,  
bipolar DACs. A flexible digital input format allows several  
AD8382s to be used in parallel for higher resolution displays.  
STSQ synchronizes sequential input loading, XFR controls  
synchronous output updating, and R/L controls the direction of  
loading as either left-to-right or right-to-left. Six channels of  
high voltage output drivers drive to within 1.3 V of the rail. The  
output signal can be adjusted for dc reference, signal inversion,  
and contrast for maximum flexibility.  
The AD8382 is fabricated on Analog Devices’ XFHV, fast  
bipolar 26 V process, providing fast input logic bipolar DACs  
with trimmed accuracy and fast settling, high voltage, precision  
drive amplifiers on the same chip. The AD8382 dissipates  
743 mW nominal static power. The STBY pin reduces power to  
a minimum, with fast recovery.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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