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AD8324JRQ-REEL7 PDF预览

AD8324JRQ-REEL7

更新时间: 2024-01-12 11:49:58
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
16页 639K
描述
3.3 V Upstream Cable Line Driver

AD8324JRQ-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:SSOP
包装说明:MO-137AD, QSOP-20针数:20
Reach Compliance Code:unknown风险等级:5.55
差分输出:YES驱动器位数:1
输入特性:STANDARD接口集成电路类型:LINE DRIVER
接口标准:GENERAL PURPOSEJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:8.6614 mm
湿度敏感等级:1功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:-25 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):240
座面最大高度:1.7526 mm最大供电电压:3.47 V
最小供电电压:3.13 V标称供电电压:3.3 V
表面贴装:YES温度等级:OTHER
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9116 mm

AD8324JRQ-REEL7 数据手册

 浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第2页浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第3页浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第4页浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第5页浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第6页浏览型号AD8324JRQ-REEL7的Datasheet PDF文件第7页 
3.3 V Upstream  
Cable Line Driver  
AD8324  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
BYP  
Supports DOCSIS 2.0 and Euro-DOCSIS standards for  
reverse path transmission systems  
Gain programmable in 1 dB steps over a 59 dB range  
Low distortion at 61 dBmV output:  
–59 dBc SFDR at 21 MHz  
V
V
V
IN+  
OUT+  
OUT–  
DIFF  
ATTENUATION  
CORE  
OUTPUT  
STAGE  
OR SINGLE  
INPUT  
AMP  
VERNIER  
V
IN–  
–54 dBc SFDR at 65 MHz  
Z
DIFF =  
OUT  
75  
Z
Z
(SINGLE) = 550Ω  
(DIFF) = 1100Ω  
IN  
IN  
8
Output noise level @ minimum gain 1.3 nV/√Hz  
Maintains 75 Ω output impedance in TX-enable and  
Transmit-disable condition  
DECODE  
POWER-  
DOWN LOGIC  
RAMP  
8
Upper bandwidth: 100 MHz (full gain range)  
3.3 V supply operation  
AD8324  
DATA LATCH  
8
Supports SPI® interfaces  
SHIFT  
REGISTER  
APPLICATIONS  
GND DATEN DATA  
CLK  
TXEN SLEEP  
DOCSIS 2.0 and Euro-DOCSIS cable modems  
CATV set-top boxes  
Figure 1. Functional Block Diagram  
CATV telephony modems  
Coaxial and twisted pair line drivers  
–40  
GENERAL DESCRIPTION  
V
= 61dBmV @ DEC 60  
OUT  
THIRD HARMONIC  
–50  
–60  
The AD83241 is a low cost amplifier designed for coaxial line  
driving. The features and specifications make the AD8324  
ideally suited for DOCSIS 2.0 and Euro-DOCSIS applications.  
The gain of the AD8324 is digitally controlled. An 8-bit serial  
word determines the desired output gain over a 59 dB range,  
resulting in gain changes of 1 dB/LSB.  
V
= 61dBmV @ DEC 60  
OUT  
SECOND HARMONIC  
–70  
–80  
The AD8324 accepts a differential or single-ended input signal.  
The output is specified for driving a 75 Ω load through a 1:1  
transformer.  
5
15  
25  
35  
45  
55  
65  
FREQUENCY (MHz)  
Figure 2. Worst Harmonic Distortion vs. Frequency  
Distortion performance of –54 dBc is achieved with an output  
level up to 61 dBmV at 65 MHz bandwidth.  
This device has a sleep mode function that reduces the quies-  
cent current to 30 µA and a full power-down function that  
reduces power-down current to 2.5 mA.  
The AD8324 is packaged in a low cost 20-lead LFCSP package  
and a 20-lead QSOP package. The AD8324 operates from a  
single 3.3 V supply.  
1 Patent pending.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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