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AD6122ARSRL PDF预览

AD6122ARSRL

更新时间: 2024-01-05 01:50:26
品牌 Logo 应用领域
亚德诺 - ADI 稳压器电信集成电路电信电路光电二极管信息通信管理
页数 文件大小 规格书
20页 264K
描述
CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator

AD6122ARSRL 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP-28针数:28
Reach Compliance Code:not_compliantECCN代码:5A991.G
HTS代码:8542.39.00.01风险等级:5.91
JESD-30 代码:R-PDSO-G28JESD-609代码:e0
长度:10.21 mm功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP28,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3 V
认证状态:Not Qualified座面最大高度:1.98 mm
子类别:Other Telecom ICs标称供电电压:3 V
表面贴装:YES技术:BICMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

AD6122ARSRL 数据手册

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CDMA 3 V Transmitter IF Subsystem  
with Integrated Voltage Regulator  
a
AD6122  
FEATURES  
range IF amplifiers with voltage-controlled gain and a power-  
down control input. An integral low dropout regulator allows  
operation from battery voltages from 2.9 V to 4.2 V.  
Fully Compliant with IS98A and PCS Specifications  
Linear IF Amplifier  
–63 dB to +34 dB  
Linear-in-dB Gain Control  
The gain control input accepts an external gain control voltage  
input from a DAC. It provides 97 dB of gain control with a  
nominal 75 dB/V scale factor. Either an internal or an external  
reference may be used to set the gain-control scale factor.  
Temperature-Compensated Gain Control  
Quadrature Modulator  
Modulates IFs from 50 MHz to 350 MHz  
Integral Low Dropout Regulator  
Accepts 2.9 V to 4.2 V Input from Battery  
Low Power  
10.4 mA at Midgain  
<10 A Sleep Mode Operation  
Companion Receiver IF Chip Available (AD6121)  
The I and Q modulator accepts differential quadrature base-  
band inputs from a CDMA baseband converter. The local oscil-  
lator is injected at twice the IF frequency. A divide-by-two  
quadrature generator followed by dual polyphase filters ensures  
1° quadrature accuracy.  
The modulator provides a common-mode reference output to  
bias the transmit DACs in the baseband converter to the same  
common-mode voltage as the modulator inputs, allowing dc  
coupling between the two ICs and thus eliminating the need to  
charge and discharge coupling capacitors. This allows the fastest  
power-up and power-down times for the AD6122 and CDMA  
baseband ICs.  
APPLICATIONS  
CDMA, W-CDMA, AMPS and TACS Operation  
QPSK Transmitters  
GENERAL DESCRIPTION  
The AD6122 is a low power IF transmitter subsystem, specifi-  
cally designed for CDMA applications. It consists of an I and Q  
modulator, a divide-by-two quadrature generator, high dynamic  
The AD6122 is fabricated using a 25 GHz ft silicon BiCMOS  
process and is packaged in a 28-lead SSOP and a 32-leadless  
LPCC chip scale package (5 mm × 5 mm).  
FUNCTIONAL BLOCK DIAGRAM  
VCC  
QUADRATURE  
MODULATOR  
OUTPUT  
IF AMPLIFIER  
INPUT  
ATTENUATOR  
QUADRATURE MODULATOR  
I INPUT  
IF AMPLIFIERS  
LOCAL  
OSCILLATOR  
INPUT  
TRANSMIT  
OUTPUT  
،2  
AD6122  
Q INPUT  
COMMON-MODE  
REFERENCE  
OUTPUT  
GAIN  
CONTROL  
SCALE  
TEMPERATURE  
COMPENSATION  
VPOS  
VREG  
LOW  
FACTOR  
DROPOUT  
REGULATOR  
POWER-  
DOWN 2  
POWER-  
DOWN 1  
GAIN CONTROL  
VOLTAGE  
INPUT  
1.23 V  
REFERENCE  
OUTPUT  
GAIN CONTROL  
REFERENCE  
VOLTAGE  
INPUT  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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