AD6121ARS

更新时间： 2024-02-03 02:43:13

品牌	Logo	应用领域
亚德诺 - ADI		稳压器接收机
页数	文件大小	规格书
16页	259K
描述
CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

AD6121ARS 数据手册

CDMA 3 V Receiver IF Subsystem

with Integrated Voltage Regulator

AD6121

FEATURES

GENERAL DESCRIPTION

Fully Compliant with IS98A and PCS Specifications

CDMA, W-CDMA, AMPS, and TACS Operation

Linear IF Amplifier

5.9 dB Noise Figure

–47.5 dB to +47 dB Linear-in-dB Gain Control

Quadrature Demodulator

The AD6121 is a low power receiver IF subsystem specifically

designed for CDMA applications. It consists of high dynamic

range IF amplifiers with voltage controlled gain, a divide-by-two

quadrature generator, an I and Q demodulator, and a power-

down control input. An integral low dropout regulator allows

operation from battery voltages from 2.9 V to 4.2 V.

Demodulates IFs from 50 MHz to 350 MHz

Integral Low Dropout Regulator

200 mV Voltage Drop

Accepts 2.9 V to 4.2 V Input from Battery

Low Power

The gain control input accepts an external gain control voltage

input from a DAC. It provides 94.5 dB of gain control with a

nominal 52.5 dB/V scale factor when using an internal voltage

reference. The gain control interface reference input can be

connected to either the internal reference or an external reference.

10 mA at Midgain

The I and Q demodulator provides differential quadrature base-

band outputs to interface with CDMA baseband converters. A

divide-by-two quadrature generator followed by dual polyphase

filters ensures maximum 2.5° quadrature accuracy.

<1 ␮A Sleep Mode Operation

Companion Transmitter IF Chip Available (AD6122)

APPLICATIONS

CDMA, W-CDMA, AMPS, and TACS Operation

QPSK Receivers

The AD6121 IF Subsystem is fabricated using a 25 GHz f_t

BiCMOS silicon process and is packaged in a 28-lead SSOP

and a 32-leadless LPCC chip scale package (5 mm × 5 mm).

FUNCTIONAL BLOCK DIAGRAM

ROOFING

FILTER

DEMODULATOR

INPUT

OUTPUT

IOUT

CDMA

INPUT

IOUT

IF AMPLIFIERS

LOCAL

OSCILLATOR

INPUT

QOUT

AD6121

INPUT

QOUT

QUADRATURE DEMODULATOR

INPUT STAGE

VPOS

LOW

DROPOUT

REGULATOR

VREG

PTAT

TEMPERATURE

COMPENSATION

GAIN CONTROL

SCALE FACTOR

POWER- POWER-

DOWN 2 DOWN 1

CONTROL REFERENCE

CDMA/FM

SELECT

GAIN

CONTROL

VOLTAGE

INPUT

GAIN

1.23V

VOLTAGE

REFERENCE

INPUT

OUTPUT

REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: http://www.analog.com

12 3 4 5 6 7...16

下载PDF

与AD6121ARS相关器件

型号	品牌	描述	获取价格	数据表
AD6121ARSRL	ADI	CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator	获取价格
AD6122	ADI	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator	获取价格
AD6122ACP	ADI	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator	获取价格
AD6122ACPRL	ADI	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator	获取价格
AD6122ARS	ADI	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator	获取价格
AD6122ARSRL	ADI	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator	获取价格