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AD5621AKSZ PDF预览

AD5621AKSZ

更新时间: 2024-02-21 05:38:42
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 466K
描述
2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70

AD5621AKSZ 技术参数

生命周期:Obsolete包装说明:TSSOP, TSSOP6,.08
Reach Compliance Code:compliant风险等级:5.84
转换器类型:D/A CONVERTER输入位码:BINARY
JESD-30 代码:R-PDSO-G6最大线性误差 (EL):0.02%
位数:12功能数量:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3/5 V认证状态:Not Qualified
最大稳定时间:18 µs子类别:Other Converters
最大压摆率:0.1 mA表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

AD5621AKSZ 数据手册

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2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit  
nanoDAC, SPI Interface in LFCSP and SC70  
Data Sheet  
AD5601/AD5611/AD5621  
FEATURES  
6-lead SC70 and LFCSP packages  
FUNCTIONAL BLOCK DIAGRAM  
V
DD  
GND  
Micropower operation: 100 µA maximum at 5 V  
Power-down typically to 0.2 µA at 3 V  
2.7 V to 5.5 V power supply  
POWER-ON  
RESET  
AD5601/AD5611/AD5621  
Guaranteed monotonic by design  
Power-on reset to 0 V with brownout detection  
3 power-down functions  
REF(+)  
DAC  
REGISTER  
OUTPUT  
BUFFER  
V
12-/10-/8-BIT  
DAC  
OUT  
Low power serial interface with Schmitt-triggered inputs  
On-chip output buffer amplifier, rail-to-rail operation  
INPUT  
CONTROL  
LOGIC  
POWER-DOWN  
CONTROL LOGIC  
RESISTOR  
NETWORK  
interrupt facility  
SYNC  
Minimized zero-code error  
AD5601 buffered 8-bit DAC  
B version: 0.5 LSB INL  
AD5611 buffered 10-bit DAC  
B version: 0.5 LSB INL  
A version: 4 LSB INL  
AD5621 buffered 12-bit DAC  
B version: 1 LSB INL  
A version: 6 LSB INL  
SYNC SCLK SDIN  
Figure 1.  
Table 1. Related Devices  
Part Number Description  
AD5641  
2.7 V to 5.5 V, <100 µA, 14-bit nanoDAC in  
SC70 and LFCSP packages  
APPLICATIONS  
Voltage level setting  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
They also provide software-selectable output loads while in  
power-down mode. The parts are put into power-down mode  
over the serial interface.  
The low power consumption of these parts in normal operation  
makes them ideally suited to portable battery-operated equip-  
ment. The combination of small package and low power makes  
these nanoDAC devices ideal for level-setting requirements,  
such as generating bias or control voltages in space-constrained  
and power-sensitive applications.  
GENERAL DESCRIPTION  
The AD5601/AD5611/AD5621, members of the nanoDAC®  
family, are single, 8-/10-/12-bit, buffered voltage output DACs  
that operate from a single 2.7 V to 5.5 V supply, consuming  
typically 75 µA at 5 V. The parts come in tiny LFCSP and SC70  
packages. Their on-chip precision output amplifier allows rail-  
to-rail output swing to be achieved. The AD5601/AD5611/  
AD5621 utilize a versatile 3-wire serial interface that operates at  
clock rates up to 30 MHz and is compatible with SPI, QSPI™,  
MICROWIRE™, and DSP interface standards.  
PRODUCT HIGHLIGHTS  
1. Available in 6-lead LFCSP and SC70 packages.  
2. Low power, single-supply operation. The AD5601/  
AD5611/AD5621 operate from a single 2.7 V to 5.5 V  
supply with a maximum current consumption of 100 µA,  
making them ideal for battery-powered applications.  
3. The on-chip output buffer amplifier allows the output of  
the DAC to swing rail-to-rail with a typical slew rate of  
0.5 V/µs.  
4. Reference is derived from the power supply.  
5. High speed serial interface with clock speeds up to  
30 MHz. Designed for very low power consumption.  
The interface powers up only during a write cycle.  
6. Power-down capability. When powered down, the DAC  
typically consumes 0.2 µA at 3 V. Power-on reset with  
brownout detection.  
The reference for the AD5601/AD5611/AD5621 is derived  
from the power supply inputs and, therefore, gives the widest  
dynamic output range. The parts incorporate a power-on reset  
circuit, which ensures that the DAC output powers up to 0 V  
and remains there until a valid write to the device takes place.  
The AD5601/AD5611/AD5621 contain a power-down feature  
that reduces current consumption to typically 0.2 µA at 3 V.  
Rev. G  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2005–2013 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 

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