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AD5322BRMZ PDF预览

AD5322BRMZ

更新时间: 2024-01-19 03:21:13
品牌 Logo 应用领域
亚德诺 - ADI 转换器光电二极管
页数 文件大小 规格书
24页 1044K
描述
2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail, Voltage Output 8-/10-/12-Bit DACs

AD5322BRMZ 数据手册

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2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail,  
Voltage Output 8-/10-/12-Bit DACs  
AD5302/AD5312/AD5322  
GENERAꢀ DESCRIPTION  
FEATURES  
AD5302: Two 8-bit buffered DACs in 1 package  
A version: 1 ꢀSB INꢀ, B version: 0.5 ꢀSB INꢀ  
AD5312: Two 10-bit buffered DACs in 1 package  
A version: 4 ꢀSB INꢀ, B version: 2 ꢀSB INꢀ  
AD5322: Two 12-bit buffered DACs in 1 package  
A version: 16 ꢀSB INꢀ, B version: 8 ꢀSB INꢀ  
10-lead MSOP  
The AD5302/AD5312/AD5322 are dual 8-, 10-, and 12-bit  
buffered voltage output DACs in a 10-lead MSOP that operate  
from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V.  
Their on-chip output amplifiers allow the outputs to swing rail-  
to-rail with a slew rate of 0.7 V/μs. The AD5302/AD5312/AD5322  
utilize a versatile 3-wire serial interface that operates at clock  
rates up to 30 MHz and is compatible with standard SPI®,  
QSPI™, MICROWIRE™, and DSP interface standards.  
Micropower operation: 300 μA @ 5 V (including  
reference current)  
The references for the two DACs are derived from two reference  
pins (one per DAC). The reference inputs can be configured as  
buffered or unbuffered inputs. The outputs of both DACs can be  
Power-down to 200 nA @ 5 V, 50 nA @ 3 V  
2.5 V to 5.5 V power supply  
Double-buffered input logic  
LDAC  
updated simultaneously using the asynchronous  
input.  
Guaranteed monotonic by design over all codes  
Buffered/Unbuffered reference input options  
0 V to VREF output voltage  
The parts incorporate a power-on reset circuit, which ensures  
that the DAC outputs power-up to 0 V and remain there until a  
valid write takes place to the device. The parts contain a power-  
down feature that reduces the current consumption of the  
devices to 200 nA at 5 V (50 nA at 3 V) and provides software-  
selectable output loads while in power-down mode.  
Power-on-reset to 0 V  
Simultaneous update of DAC outputs via ꢀDAC  
ꢀow power serial interface with Schmitt-triggered inputs  
On-chip rail-to-rail output buffer amplifiers  
Qualified for automotive applications  
The low power consumption of these parts in normal operation  
makes them ideally suited for portable battery-operated  
equipment. The power consumption is 1.5 mW at 5 V, 0.7 mW  
at 3 V, reducing to 1 μW in power-down mode.  
APPꢀICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
FUNCTIONAꢀ BꢀOCK DIAGRAM  
V
V
A
DD  
REF  
POWER-ON  
RESET  
AD5302/AD5312/AD5322  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC  
V
OUT  
A
BUFFER  
SYNC  
SCLK  
DIN  
INTERFACE  
LOGIC  
POWER-DOWN  
LOGIC  
RESISTOR  
NETWORK  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC  
V
OUT  
B
BUFFER  
RESISTOR  
NETWORK  
V
B
GND  
LDAC  
REF  
Figure 1.  
Rev. D  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 www.analog.com  
Fax: 781.461.3113 © 2006-2011 Analog Devices, Inc. All rights reserved.  
 

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