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AD5317BRU-REEL7 PDF预览

AD5317BRU-REEL7

更新时间: 2024-02-29 21:48:43
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
28页 585K
描述
2.5 V to 5.5 V, 400 muA, Quad Voltage Output

AD5317BRU-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:16
Reach Compliance Code:unknown风险等级:5.78
Is Samacsys:N最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm最大线性误差 (EL):0.2441%
湿度敏感等级:1位数:10
功能数量:1端子数量:16
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240认证状态:COMMERCIAL
座面最大高度:1.2 mm标称安定时间 (tstl):7 µs
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

AD5317BRU-REEL7 数据手册

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2.5 V to 5.5 V, 400 μA, Quad Voltage Output,  
8-/10-/12-Bit DACs in 16-Lead TSSOP  
AD5307/AD5317/AD5327  
GENERAꢀ DESCRIPTION  
FEATURES  
AD5307: 4 buffered 8-bit DACs in 16-lead TSSOP  
A version: 1 ꢀSB INꢀ; B version: 0.625 ꢀSB INꢀ  
AD5317: 4 buffered 10-bit DACs in 16-lead TSSOP  
A version: 4 ꢀSB INꢀ; B version: 2.5 ꢀSB INꢀ  
AD5327: 4 buffered 12-bit DACs in 16-lead TSSOP  
A version: 16 ꢀSB INꢀ; B version: 10 ꢀSB INꢀ  
ꢀow power operation: 400 μA @ 3 V, 500 μA @ 5 V  
2.5 V to 5.5 V power supply  
The AD5307/AD5317/AD53271 are quad 8-,10-,12-bit buffered  
voltage-output DACs in 16-lead TSSOP that operate from single  
2.5 V to 5.5 V supplies and consume 400 μA at 3 V. Their on-  
chip output amplifiers allow the outputs to swing rail-to-rail with  
a slew rate of 0.7 V/μs. The AD5307/AD5317/AD5327 utilize  
versatile 3-wire serial interfaces that operate at clock rates up to  
30 MHz; these parts are compatible with standard SPI, QSPI,  
MICROWIRE, and DSP interface standards.  
Guaranteed monotonic by design over all codes  
ꢀDAC  
Power down to 90 nA @ 3 V, 300 nA @ 5 V (  
Double-buffered input logic  
pin)  
The references for the four DACs are derived from two reference  
pins (one per DAC pair). These reference inputs can be configured  
as buffered or unbuffered inputs. Each part incorporates a power-  
on reset circuit, ensuring that the DAC outputs power up to 0 V  
and remain there until a valid write to the device takes place.  
Buffered/unbuffered reference input options  
Output range: 0 V to VREF or 0 V to 2 VREF  
Power-on reset to 0 V  
ꢀDAC  
Simultaneous update of outputs (  
CꢀR  
pin)  
CLR  
Asynchronous clear facility (  
pin)  
There is also an asynchronous active low  
DACs to 0 V. The outputs of all DACs can be updated simul-  
LDAC  
pin that clears all  
ꢀow power, SPI®-, QSPI™-, MICROWIRE™-, and DSP-  
compatible 3-wire serial interface  
SDO daisy-chaining option  
On-chip rail-to-rail output buffer amplifiers  
Temperature range of −40°C to +105°C  
taneously using the asynchronous  
input. Each part  
contains a power-down feature that reduces the current  
consumption of the device to 300 nA @ 5 V (90 nA @ 3 V). The  
parts can also be used in daisy-chaining applications using the  
SDO pin.  
APPꢀICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
All three parts are offered in the same pinout, allowing users to  
select the amount of resolution appropriate for their application  
without redesigning their circuit board.  
Industrial process control  
FUNCTIONAꢀ BꢀOCK DIAGRAM  
V
V
AB  
DD  
REF  
GAIN-SELECT  
LOGIC  
AD5307/AD5317/AD5327  
LDAC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC A  
V
V
V
A
B
BUFFER  
OUT  
SCLK  
SYNC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
BUFFER  
BUFFER  
BUFFER  
OUT  
INTERFACE  
LOGIC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
C
D
OUT  
DIN  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC D  
V
OUT  
SDO  
POWER-ON  
RESET  
POWER-DOWN  
LOGIC  
DCEN  
LDAC CLR  
V
CD  
PD GND  
REF  
Figure 1.  
1 Protected by U.S. Patent No. 5,969,657; other patents pending.  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 

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