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AD28MSP02KR PDF预览

AD28MSP02KR

更新时间: 2024-01-09 03:26:03
品牌 Logo 应用领域
亚德诺 - ADI 消费电路商用集成电路光电二极管
页数 文件大小 规格书
20页 328K
描述
Voiceband Signal Port

AD28MSP02KR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.66商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PDSO-G28JESD-609代码:e0
长度:17.9 mm功能数量:1
端子数量:28最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):220
认证状态:Not Qualified座面最大高度:2.65 mm
最大压摆率:40 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

AD28MSP02KR 数据手册

 浏览型号AD28MSP02KR的Datasheet PDF文件第2页浏览型号AD28MSP02KR的Datasheet PDF文件第3页浏览型号AD28MSP02KR的Datasheet PDF文件第4页浏览型号AD28MSP02KR的Datasheet PDF文件第5页浏览型号AD28MSP02KR的Datasheet PDF文件第6页浏览型号AD28MSP02KR的Datasheet PDF文件第7页 
a
Voiceband Signal Port  
AD28msp02  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Complete Analog I/O Port for Voiceband DSP  
Applications  
VOICEBAND  
ANALOG  
Linear-Coded 16-Bit Sigma-Delta ADC  
Linear-Coded 16-Bit Sigma-Delta DAC  
On-Chip Anti-Aliasing and Anti-lmaging Filters  
On-Chip Voltage Reference  
8 kHz Sampling Frequency  
INPUT A  
16-BIT  
+20dB  
MUX  
SIGMA-  
AMP  
DELTA ADC  
VOICEBAND  
ANALOG  
DIGITAL  
INPUT B  
DATA AND  
CONTROL  
Twos Complement Coding  
65 dB SNR + THD  
Programmable Gain on DAC and ADC  
Serial Interface To DSP Processors  
24-Pin DlP/28-Lead SOIC  
SERIAL  
PORT  
VOLTAGE  
REFERENCE  
DIFFERENTIAL  
ANALOG  
16-BIT  
SIGMA-  
Single 5 V Power Supply  
PGA  
OUTPUT  
DELTA DAC  
GENERAL DESCRIPTION  
Analog Input Amplifiers  
The AD28msp02 Voiceband Signal Port is a complete analog  
front end for high performance voiceband DSP applications.  
Compared to traditional µ-law and A-law codecs, the  
AD28msp02’s linear-coded ADC and DAC maintain wide  
dynamic range while maintaining superior SNR and THD. A  
sampling rate of 8.0 kHz coupled with 65 dB SNR + THD per-  
formance make the AD28msp02 attractive in many telecom and  
speech processing applications, for example digital cellular radio  
and high quality telephones. The AD28msp02 simplifies overall  
system design by requiring only a single +5 V power supply.  
The two analog input amplifiers (NORM, AUX) are internally  
biased by an on-chip voltage reference in order to allow opera-  
tion of the AD28msp02 with a single +5 V power supply.  
An analog multiplexer selects either the NORM or AUX ampli-  
fier as the input to the ADC’s sigma-delta modulator. The  
optional 20 dB preamplifier may be used to increase the signal  
level; the preamplifier can be inserted before the modulator or  
can be bypassed. Input signal level to the sigma-delta modulator  
should not exceed VINMAX, which is specified under “Analog  
Interface Electrical Characteristics.” Refer to “Analog Input” in  
the “Design Considerations” section of this data sheet for more  
information.  
The inclusion of on-chip anti-aliasing and anti-imaging filters,  
16-bit sigma-delta ADC and DAC, and programmable gain  
amplifiers ensures a highly integrated and compact solution to  
voiceband analog processing requirements. Sigma-delta conver-  
sion technology eliminates the need for complex off-chip anti-  
aliasing filters and sample-and-hold circuitry.  
The input multiplexer and 20 dB preamplifier are configured by  
Bits 0 and 1 (IPS, IMS) of the AD28msp02’s control register. If  
the multiplexer setting is changed while an input signal is being  
processed, the ADC’s output must be allowed time to settle to  
ensure that the output data is valid.  
The AD28msp02’s serial I/O port provides an easy interface to  
host DSP microprocessors such as the ADSP-2101, ADSP-2105  
and ADSP-2111. The AD28msp02 is available in a 24-pin, 0.3"  
plastic DIP and a 28-lead SOIC package.  
ADC  
The ADC consists of a 2nd-order analog sigma-delta modulator,  
an anti-aliasing decimation filter, and a digital high-pass filter.  
The sigma-delta modulator noise-shapes the signal and pro-  
duces 1-bit samples at a 1.0 MHz rate. This bit stream, which  
represents the analog input signal, is fed to the anti-aliasing  
decimation filter.  
FUNCTIONAL DESCRIPTION  
Figure 1 shows a block diagram of the AD28msp02.  
A/D CONVERSION  
Decimation Filter  
The A/D conversion circuitry of the AD28msp02 consists of two  
analog input amplifiers, an optional 20 dB preamplifier, and  
a sigma-delta analog-to-digital converter (ADC). The analog  
input signal to the AD28msp02 must be ac-coupled.  
The anti-aliasing decimation filter contains two stages. The first  
stage is a sinc4 digital filter that increases resolution to 16 bits  
and reduces the sample rate to 40 kHz. The second stage is an  
IIR low-pass filter.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  

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