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AD1891 PDF预览

AD1891

更新时间: 2024-02-12 23:35:42
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
20页 418K
描述
SamplePort Stereo Asynchronous Sample Rate Converters

AD1891 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QLCC
包装说明:PLASTIC, LCC-28针数:28
Reach Compliance Code:unknown风险等级:5.72
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.5062 mm
湿度敏感等级:NOT SPECIFIED端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):220认证状态:COMMERCIAL
座面最大高度:4.57 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:11.5062 mmBase Number Matches:1

AD1891 数据手册

 浏览型号AD1891的Datasheet PDF文件第2页浏览型号AD1891的Datasheet PDF文件第3页浏览型号AD1891的Datasheet PDF文件第4页浏览型号AD1891的Datasheet PDF文件第5页浏览型号AD1891的Datasheet PDF文件第6页浏览型号AD1891的Datasheet PDF文件第7页 
SamplePort Stereo Asynchronous  
Sample Rate Converters  
a
AD1890/AD1891  
SYSTEM D IAGRAM  
FEATURES  
Autom atically Sense Sam ple Frequencies—No  
Program m ing Required  
Tolerant of Sam ple Clock J itter  
Sm ooth Transition When Sam ple Clock Frequencies  
Cross  
EXAMPLE  
FREQUENCIES:  
DAT 48kHz OR  
CD 44.1kHz OR  
BROADCAST 32kHz  
EXAMPLE  
FREQUENCIES:  
DAT 48kHz OR  
CD 44.1kHz OR  
BROADCAST 32kHz  
AD1890/  
AD1891  
Accom m odate Dynam ically Changing Asynchronous  
Sam ple Clocks  
INPUT SAMPLE CLOCK  
OUTPUT SAMPLE CLOCK  
8 kHz to 56 kHz Sam ple Clock Frequency Range  
1:2 to 2:1 Ratio Betw een Sam ple Clocks  
–106 dB THD+N at 1 kHz (AD1890)  
120 dB Dynam ic Range (AD1890)  
Optim al Clock Tracking Control  
Short/ Long Group Delay Modes  
Slow / Fast Settling Modes  
OUTPUT SERIAL DATA  
INPUT SERIAL DATA  
the two clocks. The input and output sample clock frequencies  
can nominally range from 8 kHz to 56 kHz, and the ratio  
between them can vary from 1:2 to 2:1.  
Linear Phase in All Modes  
Equivalent of 4 Million 22-Bit FIR Filter Coefficients  
Stored On-Chip  
Autom atic Output Mute  
Flexible Four Wire Serial Interfaces  
Low Pow er  
T he AD1890/AD1891 use multirate digital signal processing  
techniques to construct an output sample stream from the input  
sample stream. T he input word width is 4 to 20 bits for the  
AD1890 or 4 to 16 bits for the AD1891. Shorter input words  
are automatically zero-filled in the LSBs. T he output word  
width for both devices is 24 bits. T he user can receive as many  
of the output bits as desired. Internal arithmetic is performed  
with 22-bit coefficients and 27-bit accumulation. T he digital  
samples are processed with unity gain.  
APPLICATIONS  
Digital Mixing Consoles and Digital Audio Workstations  
CD-R, DAT, DCC and MD Recorders  
Multitrack Digital Audio and Video Tape Recorders  
Studio to Transm itter Links  
Digital Audio Signal Routers/ Sw itches  
Digital Audio Broadcast Equipm ent  
High Quality D/ A Converters  
T he input and output control signals allow for considerable flex-  
ibility for interfacing to a variety of DSP chips, AES/EBU  
receivers and transmitters and for I2S compatible devices. Input  
and output data can be independently justified to the left/right  
clock edge, or delayed by one bit clock from the left/right clock  
edge. Input and output data can also be independently justified  
to the word clock rising edge or delayed by one bit clock from  
the word clock rising edge. T he bit clocks can also be indepen-  
dently configured for rising edge active or falling edge active  
operation.  
Digital Tape Recorder Varispeed Applications  
Com puter Com m unication and Multim edia System s  
P RO D UCT O VERVIEW  
The AD1890 and AD1891 SamplePorts™ are fully digital, stereo  
Asynchronous Sample Rate Converters (ASRCs) that solve sample  
rate interfacing and compatibility problems in digital audio equip-  
ment. Conceptually, these converters interpolate the input data up  
to a very high internal sample rate with a time resolution of 300 ps,  
then decimate down to the desired output sample rate. T he  
AD1890 is intended for 18- and 20-bit professional applications,  
and the AD1891 is intended for 16-bit lower cost applications  
where large dynamic sample-rate changes are not encountered.  
These devices are asynchronous because the frequency and phase  
relationships between the input and output sample clocks (both are  
inputs to the AD1890/AD1891 ASRCs) are arbitrary and need not  
be related by a simple integer ratio. There is no need to explicitly  
select or program the input and output sample clock frequencies, as  
the AD1890/AD1891 automatically sense the relationship between  
T he AD1890/AD1891 SamplePort™ ASRCs have on-chip digi-  
tal coefficients that correspond to a highly oversampled 0 kHz to  
20 kHz low-pass filter with a flat passband, a very narrow tran-  
sition band, and a high degree of stopband attenuation. A subset  
of these filter coefficients are dynamically chosen on the basis of  
the filtered instantaneous ratio between the input sample clock  
(LR_I) and the output sample clock (LR_O), and these coeffi-  
cients are used in an FIR convolver to perform the sample rate  
conversion. Refer to the “T heory of Operation” section of this  
data sheet for a more thorough functional description. T he low-  
pass filter has been designed so that full 20 kHz bandwidth is  
maintained when the input and output sample clock frequencies  
are as low as 44.1 kHz. If the output sample rate drops below  
the input sample rate, the bandwidth of the input signal is  
SamplePort and SamplePorts are trademarks of Analog Devices, Inc.  
(continued on Page 4)  
REV. 0  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700  
Fax: 617/ 326-8703  

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