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93L34DMQB PDF预览

93L34DMQB

更新时间: 2024-11-09 13:01:27
品牌 Logo 应用领域
美国国家半导体 - NSC 锁存器二极管局域网
页数 文件大小 规格书
9页 121K
描述
IC 93L SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16, FF/Latch

93L34DMQB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.8
其他特性:1:8 DMUX FOLLOWED BY LATCH; RESET ACTIVE ONLY WHEN LATCH ENABLE IS HIGH系列:93L
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.43 mm负载电容(CL):15 pF
逻辑集成电路类型:D LATCH最大I(ol):0.0048 A
位数:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):21 mA
Prop。Delay @ Nom-Sup:66 ns传播延迟(tpd):42 ns
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:LOW LEVEL
宽度:7.62 mmBase Number Matches:1

93L34DMQB 数据手册

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June 1989  
93L34  
8-Bit Addressable Latch  
General Description  
Features  
Y
Serial to parallel capability  
The 93L34 is an 8-bit addressable latch designed for gener-  
al purpose storage applications in digital systems. It is a  
multifunctional device capable of storing single line data in  
eight addressable latches, and being a one-of-eight decoder  
and demultiplexer with active level HIGH outputs. The de-  
vice also incorporates an active LOW common clear for re-  
setting all latches, as well as, an active LOW enable.  
Y
Eight bits of storage with output of each bit available  
Random (addressable) data entry  
Active high demultiplexing or decoding capability  
Easily expandable  
Y
Y
Y
Y
Common conditional clear  
Connection Diagram  
Logic Symbol  
Dual-In-Line Package  
TL/F/10201–2  
e
V
Pin 16  
Pin 8  
CC  
e
GND  
TL/F/10201–1  
Order Number 93L34DMQB or 93L34FMQB  
See NS Package Number J16A or W16A  
Pin Names  
Description  
A0A3  
Address Inputs  
D
Data Input  
E
Enable Input (Active LOW)  
Clear Input (Active LOW)  
Parallel Latch Outputs  
CL  
Q0Q7  
C
1995 National Semiconductor Corporation  
TL/F/10201  
RRD-B30M105/Printed in U. S. A.  

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