Document Number LS1043A
Rev. 2, 01/2017
NXP Semiconductors
Data Sheet: Technical Data
LS1043A
QorIQ LS1043A, LS1023A
Data Sheet
Features
• Four SerDes lanes for high-speed peripheral interfaces
– Three PCI Express 2.0 controllers supporting x4
operation
• LS1043A contains 32-bit /64-bit ARM® Cortex®-A53
MPCore Processor with the following capabilities:
– Speed up to 1.6 GHz
– One Serial ATA (SATA 3.0) controller
– Up to four SGMII supporting 1000 Mbit/s
– Up to two SGMII supporting 2500 Mbit/s
– Up to one XFI (10 GbE) interface
– Up to one QSGMII
– 32 KB L1 Instruction Cache w/parity
– 32 KB L1 Data Cache w/ECC
– Neon SIMD Co-processor
– ARM v8 Cryptography Extensions
– Supports 1000Base-KX
• 1 MB unified I/D L2 Cache w/ECC
• Additional peripheral interfaces
– One Quad Serial Peripheral Interface (QSPI)
controller, one Deserial Serial Peripheral Interface
(DSPI) controller
• Hierarchical interconnect fabric
– Hardware Managed Data coherency
– Up to 400 MHz operation
– Integrated Flash Controller (IFC) supporting NAND
and NOR flash with 28-bit addressing and 16-bit
data
– Three USB 3.0 controllers with integrated PHY
– Enhanced Secure Digital Host Controller (eSDHC)
supporting SD 3.0, eMMC 4.4, and eMMC 4.5
modes
• One 32-bit DDR3L/DDR4 SDRAM memory controller
– ECC and interleaving support
– Up to 1.6 GT/s
• Data Path Acceleration Architecture (DPAA)
incorporating acceleration for the following functions:
– Packet parsing, classification, and distribution
(FMan)
– uQE supporting TDM/HDLC
– Queue management for scheduling, packet
sequencing, and congestion management (QMan)
– Hardware buffer management for buffer allocation
and de-allocation (BMan)
– Four I2C controllers
– Two 16550 compliant DUARTs and six low-power
UARTs (LPUARTs)
– General Purpose IO (GPIO), eight Flextimers, five
Watchdog timer, four independent PWM/counters/
timer
– Trust Architecture
– Debug supporting run control, data acquisition,
high-speed trace, and performance/event monitoring
– Cryptography acceleration (SEC)
• Parallel Ethernet interfaces
– Up to two RGMII interfaces
– IEEE 1588 support
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.